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ISL12082IB8Z View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ISL12082IB8Z I2C-Bus™ Real Time Clock with Two Interrupts, Alarm, and Timer Intersil
Intersil Intersil
ISL12082IB8Z Datasheet PDF : 26 Pages
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ISL12082
EQUIVALENT AC OUTPUT LOAD CIRCUIT FOR VDD = 5V
5.0V
SDA
IRQ1/fOUT
AND
IRQ2
1533Ω
FOR VOL= 0.4V
AND IOL = 3mA
100pF
FIGURE 7. STANDARD OUTPUT LOAD FOR TESTING THE
DEVICE WITH VDD = 5.0V
General Description
The ISL12082 device is a low power real time clock with
timing and crystal compensation, clock/calendar, power fail
indicator, periodic or polled alarm, timer/watchdog, and
intelligent battery backup switching.
The oscillator uses an external, low-cost 32.768kHz crystal.
The real time clock tracks time with separate registers for
hours, minutes, seconds, and sub-seconds. The device has
calendar registers for date, month, year and day of the week.
The calendar is accurate through 2099, with automatic leap
year correction.
The ISL12082's powerful alarm can be set to any
clock/calendar value for a match. For example, every
minute, every Tuesday or at 5:23 AM on March 21. The
alarm status is available by checking the Status Register, or
the device can be configured to provide a hardware interrupt
via the IRQ1/fOUT or IRQ2 pin. There is a repeat mode for
the alarm allowing a periodic interrupt every minute, every
hour, every day, etc.
The ISL12082 has a powerful timer function. The timer status is
available by checking the Status Register, or the device can be
configured to provide a hardware interrupt via the IRQ2 pin.
The device also offers a backup power input pin. This VBAT
pin allows the device to be backed up by battery or
Supercapacitor with automatic switchover from VDD to VBAT.
The entire ISL12082 device is fully operational from 2.7V to
5.5V and the clock/calendar portion of the device remains
fully operational down to 1.8V (Standby Mode).
Pin Description
X1, X2
The X1 and X2 pins are the input and output, respectively, of
an inverting amplifier. An external 32.768kHz quartz crystal is
used with the ISL12082 to supply a timebase for the real time
clock. Internal compensation circuitry provides high accuracy
over the operating temperature range from -40°C to +85°C.
This oscillator compensation network can be used to calibrate
the crystal timing accuracy over-temperature either during
manufacturing or with an external temperature sensor and
microcontroller for active compensation. The device can also
be driven directly from a 32.768kHz source at pin X1.
8
X1
X2
FIGURE 8. RECOMMENDED CRYSTAL CONNECTION
VBAT
This input provides a backup supply voltage to the device.
VBAT supplies power to the device in the event that the VDD
supply fails. This pin can be connected to a battery, a
Supercapacitor or tied to ground if not used.
IRQ1/fOUT (Interrupt Output 1/Frequency Output)
The IRQ1/fOUT is an open drain output.
This dual function pin can be used as an interrupt or
frequency output pin. The IRQ1/fOUT mode is selected via
the IRQ1E bit of the control register (address 08h).
Interrupt Mode. The pin provides an interrupt signal
output. This signal notifies a host processor that an alarm
has occurred and requests action.
Frequency Output Mode. The pin outputs a clock signal
which is related to the crystal frequency. The frequency
output is user selectable and enabled via the I2C bus.
IRQ2 (Interrupt Output 2)
The IRQ2 is an open drain output.
The IRQ2 pin can be used as an alarm interrupt or timer
interrupt output pin. The IRQ2 mode is selected via the
IRQ2E control bits of the control register (address 08h). The
pin provides an interrupt signal output. This signal notifies a
host processor that an alarm or timer has occurred and
requests action.
Serial Clock (SCL)
The SCL input is used to clock all serial data into and out of
the device. The input buffer on this pin is always active (not
gated). It is disabled when the backup power supply on the
VBAT pin is activated to minimize power consumption.
Serial Data (SDA)
SDA is a bi-directional pin used to transfer data into and out
of the device. It has an open drain output and may be ORed
with other open drain or open collector outputs. The input
buffer is always active (not gated) in normal mode.
An open drain output requires the use of a pull-up resistor.
The output circuitry controls the fall time of the output signal
with the use of a slope controlled pull-down. The circuit is
designed for 400kHz I2C interface speeds. It is disabled
when the backup power supply on the VBAT pin is activated.
VDD, GND
Chip power supply and ground pins. The device will operate
with a power supply from 2.7V to 5.5VDC. A 0.1µF
FN6731.3
November 24, 2008
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