ISL12082IUZ-T View Datasheet(PDF) - Intersil
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ISL12082IUZ-T Datasheet PDF : 26 Pages
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ISL12082
Protocol Conventions
Data states on the SDA line can change only during SCL
LOW periods. SDA state changes during SCL HIGH are
reserved for indicating START and STOP conditions (see
Figure 12). On power-up of the ISL12082, the SDA pin is in
the input mode.
All I2C interface operations must begin with a START
condition, which is a HIGH to LOW transition of SDA while
SCL is HIGH. The ISL12082 continuously monitors the SDA
and SCL lines for the START condition and does not
respond to any command until this condition is met
(see Figure 12). A START condition is ignored during the
power-up sequence.
All I2C interface operations must be terminated by a STOP
condition, which is a LOW to HIGH transition of SDA while
SCL is HIGH (see Figure 13). A STOP condition at the end
of a read operation or at the end of a write operation to
memory only places the device in its standby mode.
An acknowledge (ACK) is a software convention used to
indicate a successful data transfer. The transmitting device,
either master or slave, releases the SDA bus after
transmitting eight bits. During the ninth clock cycle, the
receiver pulls the SDA line LOW to acknowledge the
reception of the eight bits of data (see Figure 14).
The ISL12082 responds with an ACK after recognition of a
START condition followed by a valid Identification Byte, and
once again after successful receipt of an Address Byte. The
ISL12082 also responds with an ACK after receiving a Data
Byte of a write operation. The master must respond with an
ACK after receiving a Data Byte of a read operation.
SCL
SDA
START
DATA
DATA
DATA
STABLE CHANGE STABLE
STOP
FIGURE 12. VALID DATA CHANGES, START, AND STOP CONDITIONS
SCL FROM
MASTER
1
SDA OUTPUT FROM
TRANSMITTER
8
9
HIGH IMPEDANCE
SDA OUTPUT FROM
RECEIVER
HIGH IMPEDANCE
START
ACK
FIGURE 13. ACKNOWLEDGE RESPONSE FROM RECEIVER
SIGNALS FROM
THE MASTER
SIGNAL AT SDA
SIGNALS FROM
THE ISL12082
WRITE
S
T
A IDENTIFICATION
R
BYTE
T
ADDRESS
BYTE
FIRST DATA
BYTE
S
LAST DATA
T
BYTE
O
P
11011110 0000
A
C
K
A
C
K
A
A
C
C
K
K
A
C
K
FIGURE 14. SEQUENTIAL BYTE WRITE SEQUENCE
20
FN6731.3
November 24, 2008
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