ISL12028IV30AZ View Datasheet(PDF) - Intersil

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ISL12028IV30AZ

Real Time Clock/Calendar with I2C Bus™ and EEPROM

Intersil 

ISL12028, ISL12028A

Backup Battery Operation

Many types of batteries can be used with the Intersil RTC

products. 3.0V or 3.6V Lithium batteries are appropriate, and

sizes are available that can power a Intersil RTC device for up

to 10 years. Another option is to use a supercapacitor for

applications where VDD may disappear intermittently for short

periods of time. Depending on the value of supercapacitor

used, backup time can last from a few days to two weeks (with

>1F). A simple silicon or Schottky barrier diode can be used in

series with VDD to charge the supercapacitor, which is

connected to the VBAT pin. Try to use Schottky diodes with

very low leakages, <1µA desirable. Do not use the diode to

charge a battery (especially lithium batteries!).

Note that whether a battery or supercap is used, if the VBAT

voltage drops below the data sheet minimum of 1.8V and the

VDD power cycles to 0V then back to VDD voltage, then the

RESET output may stay low and the I2C communications will

not operate. The VBAT and VDD power will need to be cycled

to 0V together to allow normal operation again.

There are two possible modes for battery backup operation,

Standard and Legacy mode. In Standard mode, there are no

operational concerns when switching over to battery backup

since all other devices functions are disabled. Battery drain

is minimal in Standard mode, and return to Normal VDD

powered operations predictable. In Legacy modes the VBAT

pin can power the chip if the voltage is above VDD and

VTRIP. This makes it possible to generate alarms and

communicate with the device under battery backup, but the

supply current drain is much higher than the Standard mode

and backup time is reduced. In this case if alarms are used

in backup mode, the IRQ/FOUT pull up resistor must be

connected to VBAT voltage source..

2.7V TO 5.5V

VDD

VBAT

VSS

SUPERCAPACITOR

FIGURE 28. SUPERCAPACITOR CHARGING CIRCUIT

I2C Communications During Battery Backup and

LVR Operation

Operation in Battery Backup mode and LVR is affected by

the BSW and SBIB bits as described earlier. These bits allow

flexible operation of the serial bus and EEPROM in battery

backup mode, but certain operational details need to be

clear before utilizing the different modes. The most

significant detail is that once VDD goes below VRESET, then

I2C communications cease regardless of whether the device

is programmed for I2C operation in battery backup mode.

Table 11 describes 4 different modes possible with using the

BSW and SBIB bits, and how they are affect LVR and battery

backup operation.

• Mode A - In this mode, selection bits indicate a low VDD

switchover combined with I2C operation in battery backup

mode. In actuality the VDD will go below VRESET before

switching to battery backup, which will disable I2C

ANYTIME the device goes into battery backup mode.

Regardless of the battery voltage, the I2C will work down

to the VRESET voltage (see Figure 29).

• Mode B - In this mode, the selection bits indicate

switchover to battery backup at VDD<VBAT, and I2C

communications in battery backup. In order to

communicate in battery backup mode, the VRESET voltage

must be less than the VBAT voltage AND VDD must be

greater than VRESET. Also, pull-ups on the I2C-bus pins

must go to VBAT to communicate. This mode is the same

as the normal operating mode of the X1228 device

• Mode C - In this mode, the selection bits indicate a low

VDD switchover combined with no communications in

battery backup. Operation is actually identical to Mode A

with I2C communications down to VDD = VRESET, then no

communications (see Figure 29).

• Mode D - In this mode, the selection bits indicate

switchover to battery backup at VDD<VBAT, and no I2C

communications in battery backup. This mode is unique in

that there is I2C communication as long as VDD is higher

than VRESET or VBAT, whichever is greater. This mode is

the safest for guaranteeing I2C communications only when

there is a Valid VDD (see Figure 30).

Note that the IRQ/FOUT CMOS output pin is active in battery

backup for all modes. This should be considered if the load

on this pin is powered down, and could draw current from

the PMOS transistor and drain the battery. If that is the case,

the designer should consider the ISL12029 device which has

an open-drain output and avoids excessive current draw in

battery backup.

25

FN8233.8

August 9, 2010

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