IS25LQ032C View Datasheet(PDF) - Integrated Silicon Solution

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IS25LQ032C

32Mbit Single Operating Voltage Serial Flash Memory With 104 MHz Dual- or 100MHz Quad-Output SPI Bus Interface

Integrated Silicon Solution 

IS25LQ032C

DEVICE OPERATION (CONTINUED)

FAST_READ COMMAND (FAST READ DATA) OPERATION

The FAST_READ instruction is used to read memory The first byte addressed can be at any memory

data at up to a 104 MHz clock.

location. The address is automatically incremented

after each byte of data is shifted out. When the highest

The FAST_READ instruction code is followed by three address is reached, the address counter will roll over to

address bytes (A23 - A0) and a dummy byte (8 clocks), the 000000h address, allowing the entire memory to be

transmitted via the SI line, with each bit latched-in

read with a single FAST_READ instruction. The

during the rising edge of SCK. Then the first data byte FAST_READ instruction is terminated by driving CE#

addressed is shifted out on the SO line, with each bit high (VIH). If a Fast Read Data instruction is issued while

shifted out at a maximum frequency fCT, during the

an Erase, Program or Write cycle is in process (BUSY=1)

falling edge of SCK.

the instruction is ignored and will not have any effects on

the current cycle

Figure 13. Fast Read Data Sequence

Integrated Silicon Solution, Inc.- www.issi.com

Rev. A

19

08/20/2012

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