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CAT64LC10L-TE13 View Datasheet(PDF) - Catalyst Semiconductor => Onsemi

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Description
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CAT64LC10L-TE13
Catalyst
Catalyst Semiconductor => Onsemi Catalyst
CAT64LC10L-TE13 Datasheet PDF : 12 Pages
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CAT64LC10/20/40
DEVICE OPERATION
The CAT64LC10/20/40 is a 1K/2K/4K-bit nonvolatile and data to be written are clocked into the DI pin on the
memory intended for use with all standard controllers. rising edge of the SK clock. The DO pin is normally in a
The CAT64LC10/20/40 is organized in a 64/128/256 x high impedance state except when outputting data in a
16 format. All instructions are based on an 8-bit format. READ operation or outputting RDY/BSY status when
There are four 16-bit instructions: READ, WRITE, EWEN, polled during a WRITE operation.
and EWDS. The CAT64LC10/20/40 operates on a single
power supply ranging from 2.5V to 6.0V and it has an on-
The format for all instructions sent to this device includes
chip voltage generator to provide the high voltage needed
a 4-bit start sequence, 1010, a 4-bit op code and an 8-
during a programming operation. Instructions, addresses
Figure 2. Sychronous Data Timing
bit address field or dummy bits. For a WRITE operation,
ts RESET
ar SK
P DI
CS
ed DO
u RDY/BUSY
tRESS
tDIS
tCSS
tDIH
tRC
tRESH
tSKLOW
tSKHI
tCSH
tPD0,tPD1 tHZ
tCSMIN
tSV
tSV
tin Figure 3. Read Instruction Timing
n RESET
co SK
DisCS
DI
10101000
ADDRESS*
DO
RDY/BUSY
HIGH
* Please check the instruction set table for address
Doc. No. 1021, Rev. C
6
D15 D14
D1 D0
 

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