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IP101A View Datasheet(PDF) - Unspecified

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IP101A Datasheet PDF : 36 Pages
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Flexible Clock Source
IP101A LF
Data Sheet
Pin1
COL/RMII
1
1
0
0
Pin44
MII/SNIB
1
0
1
0
Function
RMII, ext 50MHz osc clk in to pin7
RMII, 25MHz crystal or osc from X1,X2; 50MHz clk out to pin16. (Please refer
to the following figure for our recommened application circuit.)
MII, 25MHz crystal or osc from X1,X2
SNI, 25MHz crystal or osc from X1,X2
While pin1=1 and pin44=0 has been selected, 50MHz clock will be provided by IP101A LF in RMII mode.
We suggest the application circuit as the following :
CPU/Switch/MAC
50MHz colck
Other PHY
Buffer
25M
Pin16
Pin7
IP101A
Pin46
Pin47
For this configuration, RMII reference clock for IP101A LF is from pin7. Clock skew could be eliminated by
adding an external buffer and placing equal trace lengths between buffer outputs and each chip.
Copyright © 2004, IC Plus Corp.
26/36
Oct 22, 2007
IP101A LF-DS-R12
 

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