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ICS853001AGLFT View Datasheet(PDF) - Integrated Circuit Systems

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Description
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ICS853001AGLFT
ICST
Integrated Circuit Systems ICST
ICS853001AGLFT Datasheet PDF : 16 Pages
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Integrated
Circuit
Systems, Inc.
ICS853001
1:1, DIFFERENTIAL LVPECL-TO-
2.5V, 3.3V, 5V LVPECL/ECL BUFFER
TABLE 1. PIN DESCRIPTIONS
Number
Name
Type
Description
1
VCC
Power
2, 3
Q, nQ
Output
Positive supply pin.
Differential output pair. LVPECL interface levels.
4
VEE
Power
Negative supply pin.
5
VBB
Output
Nominal bias voltage at VCC - 1.38V.
6
nPCLK
Input
Pullup/ Inverting differential LVPECL clock input. V /2 default when left
CC
Pulldown floating. Can accept LVPECL, LVDS, CML interface levels.
7
PCLK
Input
Pulldown
Non-inverting differential LVPECL clock input.
Can accept LVPECL, LVDS, CML interface levels.
Active HIGH output enable. When logic HIGH, the output is enabled
8
OE
Input
Pullup and follows the input clock. When logic LOW, the output drives logic
low (Q=LOW, nQ=HIGH). LVCMOS/LVTTL interface levels.
NOTE: Pullup and Pulldown refer to internal input resistors. See Table 2, Pin Characteristics, for typical values.
TABLE 2. PIN CHARACTERISTICS
Symbol
RPULLDOWN
RPULLUP
Parameter
Input Pulldown Resistor
Input Pullup Resistor
Test Conditions
Minimum
Typical
37.5
37.5
Maximum
Units
K
K
853001AG
www.icst.com/products/hiperclocks.html
2
REV. A JANUARY 29, 2005
 

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