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HT66F03 View Datasheet(PDF) - Holtek Semiconductor

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HT66F03 Datasheet PDF : 139 Pages
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HT66F03/HT66F04/HT68F03/HT68F04
These three bits are used to setup the value on the internal CCRP 3-bit register, which are then
compared with the internal counter's highest three bits. The result of this comparison can be
selected to clear the internal counter if the T0CCLR bit is set to zero. Setting the T0CCLR bit to
zero ensures that a compare match with the CCRP values will reset the internal counter. As the
CCRP bits are only compared with the highest three counter bits, the compare values exist in 128
clock cycle multiples. Clearing all three bits to zero is in effect allowing the counter to overflow at
its maximum value.
ยท TM0C1 Register
Bit
Name
R/W
POR
7
T0M1
R/W
0
6
T0M0
R/W
0
5
T0IO1
R/W
0
4
T0IO0
R/W
0
3
T0OC
R/W
0
2
T0POL
R/W
0
1
T0DPX
R/W
0
0
T0CCLR
R/W
0
Bit 7~6
Bit 5~4
Bit 3
T0M1~T0M0: Select TM0 Operating Mode
00: Compare Match Output Mode
01: Undefined Mode
10: PWM Mode
11: Timer/Counter Mode
These bits setup the required operating mode for the TM. To ensure reliable operation the TM
should be switched off before any changes are made to the T0M1 and T0M0 bits. In the
Timer/Counter Mode, the TM output pin control must be disabled.
T0IO1~T0IO0: Select TP0 output function
Compare Match Output Mode
00: No change
01: Output low
10: Output high
11: Toggle output
PWM Mode
00: Force inactive state
01: Force active state
10: PWM output
11: Undefined
Timer/counter Mode
unused
These two bits are used to determine how the TM output pin changes state when a certain
condition is reached. The function that these bits select depends upon in which mode the TM is
running.
In the Compare Match Output Mode, the T0IO1 and T0IO0 bits determine how the TM output
pin changes state when a compare match occurs from the Comparator A. The TM output pin can
be setup to switch high, switch low or to toggle its present state when a compare match occurs
from the Comparator A. When the bits are both zero, then no change will take place on the
output. The initial value of the TM output pin should be setup using the T0OC bit in the TM0C1
register. Note that the output level requested by the T0IO1 and T0IO0 bits must be different from
the initial value setup using the T0OC bit otherwise no change will occur on the TM output pin
when a compare match occurs. After the TM output pin changes state it can be reset to its initial
level by changing the level of the T0ON bit from low to high.
T0OC: TP0 Output control bit
Compare Match Output Mode
0: Initial low
1: Initial high
PWM Mode
0: Active low
1: Active high
This is the output control bit for the TM output pin. Its operation depends upon whether TM is
being used in the Compare Match Output Mode or in the PWM Mode. It has no effect if the TM is
in the Timer/Counter Mode. In the Compare Match Output Mode it determines the logic level of
the TM output pin before a compare match occurs. In the PWM Mode it determines if the PWM
signal is active high or active low.
Rev. 1.00
58
April 16, 2010
 

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