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HT66F03 View Datasheet(PDF) - Holtek Semiconductor

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Description
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HT66F03 Datasheet PDF : 139 Pages
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HT66F03/HT66F04/HT68F03/HT68F04
Compact Type TM
Although the simplest form of the three TM types, the Compact TM type still contains three operating modes, which are
Compare Match Output, Timer/Event Counter and PWM Output modes. The Compact TM can also be controlled with
an external input pin and can drive one or two external output pin. These two external output pins can be the same sig-
nal or the inverse signal.
CTM
All devices
Name
10-bit CTM
TM No.
0
TM Input Pin
TCK0
TM Output Pin
TP0
Compact TM Operation
At its core is a 10-bit count-up counter which is driven by a user selectable internal or external clock source. There are
also two internal comparators with the names, Comparator A and Comparator P. These comparators will compare the
value in the counter with CCRP and CCRA registers. The CCRP is three bits wide whose value is compared with the
highest three bits in the counter while the CCRA is the ten bits and therefore compares with all counter bits.
The only way of changing the value of the 10-bit counter using the application program, is to clear the counter by chang-
ing the TnON bit from low to high. The counter will also be cleared automatically by a counter overflow or a compare
match with one of its associated comparators. When these conditions occur, a TM interrupt signal will also usually be
generated. The Compact Type TM can operate in a number of different operational modes, can be driven by different
clock sources including an input pin and can also control an output pin. All operating setup conditions are selected us-
ing relevant internal registers.
fS Y S /4
fS Y S
fH /1 6
fH /6 4
fT B C
R e s e rv e d
TC Kn
000
001
010
011
100
101
110
111
TnO N
TnP A U
TnC K 2~TnC K 0
CCRP
3 - b it C o m p a r a to r P
C o m p a ra to r P M a tc h
b7~b9
1 0 - b it C o u n t- u p C o u n te r
C o u n te r C le a r 0
1
b0~b9
TnC C LR
1 0 - b it C o m p a r a to r A
C o m p a ra to r A M a tc h
CCRA
Compact Type TM Block Diagram
T n P F In te rru p t
TnO C
O u tp u t
C o n tro l
P o la r ity
C o n tro l
TPn
TnM 1,TnM 0
T n IO 1 , T n IO 0
TnP O L
T n A F In te rru p t
Rev. 1.00
55
April 16, 2010
 

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