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HT66F03 Ver la hoja de datos (PDF) - Holtek Semiconductor

Número de pieza
componentes Descripción
fabricante
HT66F03 Datasheet PDF : 139 Pages
HT66F03/HT66F04/HT68F03/HT68F04
The power-on reset condition of the A/D converter con-
trol registers ensures that any A/D input pins - which are
always shared with other I/O functions - will be setup as
analog inputs after a reset. Although these pins will be
configured as A/D inputs after a reset, the A/D converter
will not be switched on. It is therefore important to note
that if it is required to use these pins as I/O digital input
pins or as other functions, the A/D converter control reg-
isters must be correctly programmed to remove the A/D
function. Note also that as the A/D channel is enabled,
any internal pull-high resistor connections will be re-
moved.
Port A has the additional capability of providing wake-up
functions. When the device is in the SLEEP or IDLE
Mode, various methods are available to wake the device
up. One of these is a high to low transition of any of the
Port A pins. Single or multiple pins on Port A can be
setup to have this function.
D a ta B u s
C o n tr o l B it
DQ
P u ll- H ig h
R e g is te r
S e le c t
V DD
W eak
P u ll- u p
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
R e a d D a ta R e g is te r
CK Q
S
D a ta B it
DQ
CK Q
S
M
U
X
I/O p in
S y s te m W a k e -u p
W a k e - u p S e le c t P A o n ly
Generic Input/Output Structure
D a ta B u s
W r ite C o n tr o l R e g is te r
C h ip R e s e t
R e a d C o n tr o l R e g is te r
W r ite D a ta R e g is te r
R e a d D a ta R e g is te r
T o A /D C o n v e rte r
Rev. 1.00
C o n tr o l B it
DQ
P u ll- H ig h
R e g is te r
S e le c t
CK Q
S
V DD
W eak
P u ll- u p
D a ta B it
DQ
CK Q
S
M
U
X
A n a lo g
In p u t
S e le c to r
A C S 3~A C S 0
A/D Input/Output Structure
51
A /D In p u t P in s
April 16, 2010
 

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