HI-3200 View Datasheet(PDF) - Holt Integrated Circuits

Part Name

Description

View to exact match

HI-3200

AVIONICS DATA MANAGEMENT ENGINE / ARINC 429 - CAN BUS BRIDGE

Holt Integrated Circuits 

HI-3200, HI-3201

ARINC 429 Received Data FIFO Status Registers

FIFO NOT EMPTY REGISTER

(Address 0x802B)

AFNEA7FNEA6FNEA5FNEA4FNEA3FNEA2FNE1

76543210

MSB

LSB

Bit Name

R/W Default Description

7 AFNE7

R

0 This bit is set to “1” if FIFO #7 contains at least one ARINC 429 message

6 AFNE6

R

0 This bit is set to “1” if FIFO #6 contains at least one ARINC 429 message

5 AFNE5

R

0 This bit is set to “1” if FIFO #5 contains at least one ARINC 429 message

4 AFNE4

R

0 This bit is set to “1” if FIFO #4 contains at least one ARINC 429 message

3 AFNE3

R

0 This bit is set to “1” if FIFO #3 contains at least one ARINC 429 message

2 AFNE2

R

0 This bit is set to “1” if FIFO #2 contains at least one ARINC 429 message

1 AFNE1

R

0 This bit is set to “1” if FIFO #1 contains at least one ARINC 429 message

0 AFNE0

R

0 This bit is set to “1” if FIFO #0 contains at least one ARINC 429 message

AFTF7AFTF6AFTF5AFTF4AFTF3AFTF2AFTF1

FIFO THRESHOLD REGISTER

(Address 0x802A)

76543210

MSB

LSB

Bit Name

R/W Default Description

7 AFTF7

R

0 This bit is set to “1” if FIFO #7 contains > threshold number of ARINC 429 messages

6 AFTF6

R

0 This bit is set to “1” if FIFO #6 contains > threshold number of ARINC 429 messages

5 AFTF5

R

0 This bit is set to “1” if FIFO #5 contains > threshold number of ARINC 429 messages

4 AFTF4

R

0 This bit is set to “1” if FIFO #4 contains > threshold number of ARINC 429 messages

3 AFTF3

R

0 This bit is set to “1” if FIFO #3 contains > threshold number of ARINC 429 messages

2 AFTF2

R

0 This bit is set to “1” if FIFO #2 contains > threshold number of ARINC 429 messages

1 AFTF1

R

0 This bit is set to “1” if FIFO #1 contains > threshold number of ARINC 429 messages

0 AFTF0

R

0 This bit is set to “1” if FIFO #0 contains > threshold number of ARINC 429 messages

FIFO FULL REGISTER

(Address 0x8029)

AFFF7AFFF6AFFF5AFFF4AFFF3AFFF2AFFF1

76543210

MSB

LSB

Bit Name

R/W Default Description

7 AFFF7

R/W 0 This bit is set to “1” if FIFO #7 contains 32 ARINC 429 messages

6 AFFF6

R/W 0 This bit is set to “1” if FIFO #6 contains 32 ARINC 429 messages

5 AFFF5

R/W 0 This bit is set to “1” if FIFO #5 contains 32 ARINC 429 messages

4 AFFF4

R/W 0 This bit is set to “1” if FIFO #4 contains 32 ARINC 429 messages

3 AFFF3

R/W 0 This bit is set to “1” if FIFO #3 contains 32 ARINC 429 messages

2 AFFF2

R/W 0 This bit is set to “1” if FIFO #2 contains 32 ARINC 429 messages

1 AFFF1

R/W 0 This bit is set to “1” if FIFO #1 contains 32 ARINC 429 messages

0 AFFF0

R/W 0 This bit is set to “1” if FIFO #0 contains 32 ARINC 429 messages

HOLT INTEGRATED CIRCUITS

19

Share Link: