|HCPL-0500-000E||Single Channel, High Speed Optocouplers|
|HCPL-0500-000E Datasheet PDF : 17 Pages |
Single Channel, High Speed Optocouplers
Lead (Pb) Free
RoHS 6 fully
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
These diode-transistor optoc ouplers use an insulating
layer between a LED and an integrated photodetector to
provide electrical insulation between input and output.
Separate connections for the photodiode bias and out-
put-transistor collector increase the speed up to a hun-
dred times that of a conventional phototransistor coupler
by reducing the base-collector capacitance.
These single channel optocouplers are available in
8-Pin DIP, SO-8 and Widebody package configurations.
The 6N135, HCPL-0500, and HCNW135 are for use in TTL/
CMOS, TTL/LSTTL or wide bandwidth analog applications.
Current transfer ratio (CTR) for these devices is 7% mini-
mum at IF = 16 mA.
The 6N136, HCPL-2502, HCPL-0501, and HCNW136 are
designed for high speed TTL/TTL applications. A standard
16 mA TTL sink current through the input LED will pro-
vide enough output current for 1 TTL load and a 5.6 kΩ
pull-up resistor. CTR for these devices is 19% minimum at
IF = 16 mA.
• High speed: 1 Mb/s
• TTL compatible
• Available in 8-Pin DIP, SO-8, widebody packages
• Open collector output
• Safety approval
UL Recognized – 3750 Vrms for 1 minute (5000 Vrms
for 1 minute for HCNW and Option 020 devices)
IEC/EN/DIN EN 60747-5-2 Approved
– VIORM = 560 V peak for SO8 devices
– VIORM = 630 V peak for DIP 300mil devices
– VIORM = 1414 V peak for DIP 400mil (widebody)
• Dual channel version available (253X/053X/0534)
• High voltage insulation
• Video signal isolation
• Line receivers
• Feedback element in switched mode power supplies
• High speed logic ground isolation
– TTL/TTL, TTL/CMOS, TTL/LSTTL
• Replaces pulse transformers
• Replaces slow phototransistor isolators
• Analog signal ground isolation
A 0.1 µF bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and/or degradation which may be induced by ESD.
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