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HCPL-0300-300 View Datasheet(PDF) - HP => Agilent Technologies

Part NameDescriptionManufacturer
HCPL-0300-300 8 MBd Low Input Current Optocoupler HP
HP => Agilent Technologies HP
HCPL-0300-300 Datasheet PDF : 12 Pages
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7
Package Characteristics
For -40°C TA 85°C, unless otherwise specified. All typicals at TA = 25°C.
Parameter
Symbol
Input-Output Momentary VISO
Withstand Voltage*
Resistance, Input-Output
RI-O
Capacitance, Input-Output CI-O
Min.
3750
Typ.
1012
0.6
Max. Units
V rms
pF
Test Conditions
RH 50%, t = 1 min,
TA = 25°C
VI-O = 500 V
f = 1 MHz
Fig. Notes
3, 9
3
3
*The Input-Output Momentary Withstand Voltage is a dielectric voltage rating that should not be interpreted as an input-output
continuous voltage rating. For the continuous voltage rating refer to the IEC/EN/DIN EN 60747-5-2 Insulation Characteristics Table
(if applicable), your equipment level safety specification, or Agilent Application Note 1074, “Optocoupler Input-Output Endurance
Voltage.”
Notes:
1. Bypassing the power supply line is
required with a 0.1 µF ceramic disc
capacitor adjacent to each optocoupler
as illustrated in Figure 19. The power
supply bus for the optocoupler(s)
should be separate from the bus for
any active loads, otherwise a larger
value of bypass capacitor (up to
0.5 µF) may be needed to suppress
regenerative feedback via the power
supply.
2. Peaking circuits may produce transient
input currents up to 100 mA, 500 ns
maximum pulse width, provided
average current does not exceed 5 mA.
3. Device considered a two terminal
device: pins 1, 2, 3, and 4 shorted
together, and pins 5, 6, 7, and 8
shorted together.
4. The tPLH propagation delay is
measured from the 50% point on the
trailing edge of the input pulse to the
1.5 V point on the trailing edge of the
output pulse.
5. The tPHL propagation delay is
measured from the 50% point on the
leading edge of the input pulse to the
1.5 V point on the leading edge of the
output pulse.
6. CMH is the maximum tolerable rate of
rise of the common mode voltage to
assure that the output will remain in a
high logic state (i.e., VOUT > 2.0 V).
7. CML is the maximum tolerable rate of
fall of the common mode voltage to
assure that the output will remain in a
low logic state (i.e., VOUT < 0.8 V).
8. CP is the peaking capacitance. Refer to
test circuit in Figure 8.
9. In accordance with UL 1577, each
optocoupler is momentary withstand
proof tested by applying an insulation
test voltage 4500 Vrms for 1 second
(leakage detection current limit,
II-O 5 µA). This test is performed
before the 100% production test for
partial discharge (Method b) shown in
the IEC/EN/DIN EN 60747-5-2
Insulation Characteristics Table, if
applicable.
Figure 2. Typical Input Diode
Forward Characteristics.
Figure 3. Typical Output Voltage vs.
Forward Input Current vs.
Temperature.
Figure 4. Typical Logic High Output
Current vs. Temperature.
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