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HCPL-0300-300 View Datasheet(PDF) - HP => Agilent Technologies

Part NameDescriptionManufacturer
HCPL-0300-300 8 MBd Low Input Current Optocoupler HP
HP => Agilent Technologies HP
HCPL-0300-300 Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
8 MBd Low Input Current
Optocoupler
Technical Data
HCPL-2300/HCPL-0300
Features
• Guaranteed Low Thresholds:
IF = 0.5 mA, VF 1.5 V
• High Speed: Guaranteed
5 MBd over Temperature
• Versatile: Compatible with
TTL, LSTTL and CMOS
• Efficient 820 nm AlGaAs LED
• Internal Shield for
Guaranteed Common Mode
Rejection
• Schottky Clamped, Open
Collector Output with
Optional Integrated Pull-Up
Resistor
• Static and Dynamic
Performance Guaranteed
from -40°C to 85°C
• Safety Approval
UL Recognized -3750 V rms for
1 minute
CSA Approved
IEC/EN/DIN EN 60747-5-2
Approved with VIORM = 630
V peak
(Option 060)
Applications
• Ground Loop Elimination
• Computer-Peripheral
Interfaces
• Level Shifting
• Microprocessor System
Interfaces
• Digital Isolation for A/D,
D/A Conversion
• RS-232-C Interface
• High Speed, Long Distance
Isolated Line Receiver
Description
The HCPL-2300/HCPL-0300
optocoupler combines an 820 nm
AlGaAs photon emitting diode
with an integrated high gain
photon detector. This
combination of Agilent designed
and manufactured semiconductor
devices brings new high
performance capabilities to
designers of isolated logic and
data communication circuits.
The new low current, high speed
AlGaAs emitter manufactured
with a unique diffused junction,
has the virtue of fast rise and fall
times at low drive currents.
Figure 6 illustrates the propaga-
tion delay vs. input current
characteristic. These unique
Functional Diagram
Schematic
NC 1
ANODE 2
CATHODE 3
NC 4
8 VCC
7 RL
IF
+
2
VF
6 VOUT
3
5 GND
SHIELD
A 0.1 µF CAPACITOR MUST
BE CONNECTED BETWEEN
PINS 8 AND 5 (SEE NOTE 1).
1000
ICC
8 VCC
RL
7
6 VO
GND
5
TRUTH TABLE
(POSITIVE LOGIC)
LED OUTPUT
ON
L
OFF
H
A 0.1 pF bypass capacitor must be connected between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to
prevent damage and/or degradation which may be induced by ESD.
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