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HA16114FP View Datasheet(PDF) - Hitachi -> Renesas Electronics

Part Name
Description
View to exact match
HA16114FP
Hitachi
Hitachi -> Renesas Electronics Hitachi
HA16114FP Datasheet PDF : 38 Pages
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HA16114P/PJ/FP/FPJ, HA16120FP/FPJ
Sawtooth wave VCT
Dead band VDB
Error output VE/O
PWM pulse output
(In case of HA16120)
Power MOS FET
drain current (ID)
(dotted line shows
inductor current)
Current limiter VIN
pin (CL)
VIN 0.2 V
Example of step-up circuit
VIN
CF
RF
RCS
IC CL
OUT
Inductor
L
ID
VOUT
VTH (CL)
F.B.
Determined by L and VIN
Determined by RCS and RF
Figure 7.6
8. Setting the Overcurrent Detection Threshold
The voltage drop VTH at which overcurrent is detected in these ICs is typically 0.2 V. The bias current is
typically 200 µA. The power MOS FET peak current value before the current limiter goes into operation is
given as follows.
ID =
VTH (RF + RCS) × IBCL
RCS
Where, VTH = VIN – VCL = 0.2 V, VCL is a voltage refered on GND.
Note that RF and CF form a low-pass filter with a cutoff frequency determined by their RC time constant.
This filter prevents incorrect operation due to current spikes when the power MOS FET is switched on or
off.
VIN
To other
circuitry
1k
200 µA
CF 1800 pF
I BCL
RCS
0.05
CL
OUT
Detector
output
(internal)
+
IN()
RF
240
G
S
D
+
VIN
VO
Note: This circuit is an example for step-down use.
Figure 8.1 Example for Step-Down Use
With the values shown in the diagram, the peak current is:
ID =
0.2 V (240 + 0.05 ) × 200 µA
0.05
= 3.04 A
The filter cutoff frequency is calculated as follows:
1
1
fC = 2π CF RF = 6.28 × 1800 pF × 240 = 370 kHz
19
 

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