GMS82524TK View Datasheet(PDF) - Hynix Semiconductor

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GMS82524TK

8-BIT SINGLE-CHIP MICROCONTROLLERS

Hynix Semiconductor 

HYUNDAI MicroElectronics

GMS82512/16/24

10. BASIC INTERVAL TIMER

The GMS825xx has one 8-bit Basic Interval Timer that is

free-run and can not stop. Block diagram is shown in Fig-

ure 10-1.

In addition, the Basic Interval Timer generates the time

base for watchdog timer counting. It also provides a Basic

interval timer interrupt (BITIF). As the count overflow

from FFH to 00H, this overflow causes the interrupt to be

generated. The Basic Interval Timer is controlled by the

clock control register (CKCTLR) shown in Figure 10-2.

Source clock can be selected by lower 3 bits of CKCTLR.

BITR and CKCTLR are located at same address, and ad-

dress 0D3H is read as a BITR, and written to CKCTLR.

XIN PIN

÷16

÷32

÷64

÷128

÷256

÷512

÷1024

÷2048

MUX

source

clock

8-bit up-counter

BITR

[0F9H]

clear

overflow

Select Input clock 3

BTS[2:0]

[0D3H]

Basic Interval Timer

clock control register

CKCTLR

BTCL

Read

Internal bus line

BITIF Basic Interval Timer Interrupt

To Watchdog timer (WDTCK)

Figure 10-1 Block Diagram of Basic Interval Timer

CKCTLR

[2:0]

000

001

010

011

100

101

110

111

Source clock

fXIN÷16

fXIN÷32

fXIN÷64

fXIN÷128

fXIN÷256

fXIN÷512

fXIN÷1024

fXIN÷ 2048

Interrupt (overflow) Period (ms)

@ fXIN = 8MHz

0.512

1.024

2.048

4.096

8.192

16.384

32.768

65.536

Table 10-1 Basic Interval Timer Interrupt Time

FEB. 2000 Ver 1.00

31

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