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FIN3386 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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FIN3386 Datasheet PDF : 21 Pages
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Transmitter Pin Configuration
Figure 3. FIN3385 (28:4 Transmitter) Pin Assignments
Pin Definitions
Pin Names
TxIn
TxCLKIn
TxOut+
TxOut-
TxCLKOut+
TxCLKOut-
I/O Types
I
I
O
O
O
O
R_FB
I
/PwrDn
I
PLL VCC
I
PLL GND
I
LVDS VCC
I
LVDS GND
I
VCC
I
GND
I
© 2003 Fairchild Semiconductor Corporation
FIN3385 / FIN3386 • Rev. 1.0.6
Number of Pins
28/21
1
4/3
4/3
1
1
1
1
1
2
1
3
3
5
Description of Signals
LVTTL Level Input
LVTTL Level Clock Input, the rising edge is for data strobe
Positive LVDS Differential Data Output
Negative LVDS Differential Data Output
Positive LVDS Differential Clock Output
Negative LVDS Differential Clock Output
Rising Edge Data Strobe: Assert HIGH (VCC)
Falling Edge Data Strobe: Assert LOW (Ground)
LVTTL Level Power-Down Input Assertion (LOW) puts the
outputs in High-Impedance state
Power Supply Pin for PLL
Ground Pins for PLL
Power Supply Pin for LVDS Output
Ground Pins for LVDS Output
Power Supply Pins for LVTTL Input
Ground Pin for LVTTL Input
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