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FAN7602N View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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FAN7602N
Fairchild
Fairchild Semiconductor Fairchild
FAN7602N Datasheet PDF : 18 Pages
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Applications Information
1. Start-up Circuit and Soft-Start Block
The FAN7602 contains a start-up switch to reduce the
power loss of the external start-up circuit of the conven-
tional PWM converters. The internal start-up circuit
charges the VCC capacitor with 0.9mA current source if
the AC line is connected. The start-up switch is turned off
15ms after IC starts up, as shown in Figure 19. The soft-
start function starts when the VCC voltage reaches the
start threshold voltage of 12V and ends when the internal
soft-start voltage reaches 1V. The internal start-up circuit
starts charging the VCC capacitor again if the VCC volt-
age is lowered to the minimum operating voltage, 8V.
The UVLO block shuts down the output drive circuit and
some blocks to reduce the IC operating current and the
internal soft-start voltage drops to zero. If the VCC volt-
age reaches the start threshold voltage, the IC starts
switching again and the soft-start block works as well.
During the soft-start, pulse-width modulated (PWM) com-
parator compares the CS/FB pin voltage with the soft-
start voltage. The soft-start voltage starts from 0.5V and
the soft-start ends when it reaches 1V and the soft-start
time is 10ms. The start-up switch is turned off when the
soft-start voltage reaches 1.5V.
12V
VCC
8V
Start-up
Current
1.5V
1V
0.5V
Soft-Start
Voltage
Soft-Start
Time (10ms)
5ms
t
FAN7602 Rev. 02
Figure 19. Start-up Current and VCC Voltage
2. Oscillator Block
The oscillator frequency is set internally and a frequency
modulation (FM) function reduces EMI. The average fre-
quency is 65kHz and the modulation frequency is ±2kHz.
The frequency varies from 63kHz to 67kHz with 16
steps. The frequency step is 250Hz and FM frequency is
125Hz, as shown in Figure 20.
3. Current Sense and Feedback Block
The FAN7602 performs the current sensing for the cur-
rent mode PWM and the output voltage feedback with
only one pin, pin 3. To achieve the two functions with one
pin, an internal LEB (leading edge blanking) circuit to fil-
ter the current sense noise is not included because the
external RC filter is necessary to add the output voltage
feedback information and the current sense information.
Figure 21 shows the current sense and feedback circuits.
RS is the current sense resistor to sense the switch cur-
rent. The current sense information is filtered by an RC
filter composed of RF and CF. According to the output
voltage feedback information, IFB charges or stops charg-
ing CF to adjust the offset voltage. If IFB is zero, CF is dis-
charged through RF and RS to lower the offset voltage.
67kHz
16 steps
1 step=250Hz
63kHz
125Hz
FAN7602 Rev. 02
Figure 20. Frequency Modulation
Figure 22 shows typical voltage waveforms of the CS/FB
pin. The current sense waveform is added to the offset
voltage as shown in the figure. The CS/FB pin voltage is
compared with PWM+ that is 1V - Plimit offset as shown
in Figure 22. If the CS/FB voltage meets PWM+, the out-
put drive is shut off. As shown in Figure 22, if the feed-
back offset voltage is low, the switch on time is
increased. If the feedback offset voltage is high, the
switch on time is decreased. In this way, the duty cycle is
controlled according to the output load condition. In gen-
eral, the maximum output power increases as the input
voltage increases because the current slope during
switch on-time increases. To limit the output power of the
converter constantly, the power limit function is included
in the FAN7602. Sensing the converter input voltage
through the Latch/Plimit pin, the Plimit offset voltage is
subtracted from 1V. As shown in Figure 22, the Plimit off-
set voltage is subtracted from 1V and the switch on-time
decreases as the Plimit offset voltage increases. If the
converter input voltage increases, the switch on-time
decreases, controlling the output power constant. The
offset voltage is proportional to the Latch/Plimit pin volt-
age and the gain is 0.16. If the Latch/Plimit voltage is 1V,
the offset voltage is 0.16V.
PWM
Comparator
PWM+
Soft-Start
Plimit
Offset
Power
Limit
VCC
RFB
CS/FB
3
CF
IFB
RF
Isw
RS
FAN7602 Rev. 02
Figure 21. Current Sense and Feedback Circuits
© 2006 Fairchild Semiconductor Corporation
FAN7602 Rev. 1.0.2
10
www.fairchildsemi.com
 

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