FAN7554D View Datasheet(PDF) - Fairchild Semiconductor

Part Name

Description

View to exact match

FAN7554D

Versatile PWM Controller

Fairchild Semiconductor 

FAN7554

Vfb

6V

Slope (dv/dt) = 5uA / Cfb

Shutdown start point

3V

t1

t2

t

Figure 17-B . Delayed Shutdown & Feedback Waveform

Gate Driver

The gate drive circuit has the totem-pole output configuration. The output has 1A peak current and 200mA average current

drive ability.

7

DRAIN

Clock

OUT

Q

6

Shutdown

FAN7554

Figure 18. Gate Drive Circuit

ON/OFF Control

The FAN7554 is able to use the feedback pin for ON/OFF control by placing NPN transistor between the cathode of the

KA431 and ground as shown in figure 19. When the transistor turns on, the current flows through the photo diode and

saturates the photo transistor. As a result, the feedback voltage is dropped to zero. When the feedback voltage is below 0.3V,

the soft start voltage starts to discharge by connecting the internal resistor 1kΩ in parallel with the external capacitor Cs. When

the soft start voltage becomes less than 1.5V, all the blocks in the FAN7554 are turned off , with the exceptions of the UVLO

block and ON/OFF control block. The operation current is about 200uA. So the stand-by power is reduced and SMPS

efficiency is improved. When the feedback voltage exceeds 0.3V, the FAN7554 normally operates by turning on Vref block.

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