FAN5400 View Datasheet(PDF) - Fairchild Semiconductor

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FAN5400

USB-Compliant Single-Cell Li-Ion Switching Charger with USB-OTG Boost Regulator

Fairchild Semiconductor 

Additional JA data points, measured using the FAN540X

evaluation board, are given in Table 11 (measured with

TA=25°C). Note that as power dissipation increases, the

effective JA decreases due to the larger difference between

the die temperature and its ambient.

Table 11. FAN5400 Evaluation Board Measured JA

Power (W)

0.504

JA

54°C/W

0.844

50°C/W

1.506

46°C/W

Charge Mode Input Supply Protection

Sleep Mode

When VBUS falls below VBAT + VSLP, and VBUS is above

VIN(MIN), the IC enters Sleep Mode to prevent the battery from

draining into VBUS. During Sleep Mode, reverse current is

disabled by body switching Q1.

Input Supply Low-Voltage Detection

The IC continuously monitors VBUS during charging. If VBUS

falls below VIN(MIN), the IC:

1. Terminates charging

2. Pulses the STAT pin, sets the STAT bits to 11, and sets

the FAULT bits to 011.

If VBUS recovers above the VIN(MIN) rising threshold after time

tINT (about two seconds), the charging process is repeated.

This function prevents the USB power bus from collapsing or

oscillating when the IC is connected to a suspended USB

port or a low-current-capable OTG device.

Input Over-Voltage Detection

When the VBUS exceeds VBUSOVP, the IC:

1. Turns off Q3

2. Suspends charging

3. Sets the FAULT bits to 001, sets the STAT bits to 11,

and pulses the STAT pin.

When VBUS falls about 150mV below VBUSOVP, the fault is

cleared and charging resumes after VBUS is revalidated (see

VBUS POR / Non-Compliant Charger Rejection).

VBUS Short While Charging

If VBUS is shorted with a very low impedance while the IC is

charging with IINLIMIT=100mA, the IC may not meet datasheet

specifications until power is removed. To trigger this

condition, VBUS must be driven from 5V to GND with a high

slew rate. Achieving this slew rate requires a 0 short to the

USB cable less than 10cm from the connector.

Charge Mode Battery Detection & Protection

VBAT Over-Voltage Protection

The OREG voltage regulation loop prevents VBAT from

overshooting the OREG voltage by more than 50mV when

the battery is removed. When the PWM charger runs with no

battery, the TE bit is not set and a battery is inserted that is

charged to a voltage higher than VOREG; PWM pulses stop. If

no further pulses occur for 30ms, the IC sets the FAULT bits

to 100, sets the STAT bits to 11, and pulses the STAT pin.

Battery Detection During Charging

The IC can detect the presence, absence, or removal of a

battery if the termination bit (TE) is set. During normal

charging, once VBAT is close to VOREG and the termination

charge current is detected, the IC terminates charging and

sets the STAT bits to 10. It then turns on a discharge current,

IDETECT, for tDETECT. If VBAT is still above VOREG – VRCH, the

battery is present and the IC sets the FAULT bits to 000. If

VBAT is below VOREG – VRCH, the battery is absent and the IC:

1. Sets the registers to their default values.

2. Sets the FAULT bits to 111.

3. Resumes charging with default values after tINT.

Battery Short-Circuit Protection

If the battery voltage is below the short-circuit threshold

(VSHORT); a linear current source, ISHORT, supplies VBAT until

VBAT > VSHORT.

Battery Detection During Power-up

For FAN5400 and FAN5403

At VBUS POR, a 5K load is applied to VBAT for 500ms to

discharge any residual system capacitance in case the

battery is absent. If VBAT < VSHORT, linear charging

commences. When VBAT rises above VSHORT, PWM charging

proceeds with the float voltage (OREG) temporarily set to

4V. If the battery voltage exceeds 3.7V within 32ms of the

beginning of PWM charging, the battery is absent. If battery

absent is detected:

1. High-Impedance Mode is entered.

2. FAULT bits are set to 111.

3. The t15MIN timer is disabled until VBUS is removed.

If VBAT remains below 3.7V during the initial 32ms period, the

float voltage returns to the OREG register setting and PWM

charging continues.

System Operation with No Battery

The FAN5402 and FAN5405 continue charging after VBUS

POR with the default parameters, regulating the VBAT line to

3.54V until the host processor issues commands or the 15-

minute timer expires. In this way, the FAN5402 and

FAN5405 can start the system without a battery.

The FAN540X soft-start function can interfere with the

system supply with battery absent. The soft-start activates

whenever VOREG, IINLIM, or IOCHARGE are set from a lower to

higher value. During soft-start, the IIN limit drops to 100mA

for about 1ms unless IINLIM is set to 11 (no limit). This could

cause the system processor to fail to start. To avoid this

behavior, use the following sequence.

1. Set the OTG pin HIGH. When VBUS is plugged in, IINLIM

is set to 500mA until the system processor powers up

and can set parameters through I2C.

2. Program the Safety Register.

3. Set IINLIM to 11 (no limit).

4. Set OREG to the desired value (typically 4.18).

5. Reset the IOLEVEL bit, then set IOCHARGE.

6. Set IINLIM to 500mA if a USB source is connected.

© 2009 Fairchild Semiconductor Corporation

FAN5400 Family • Rev. 1.0.7

25

www.fairchildsemi.com

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