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FAN5018B View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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FAN5018B
Fairchild
Fairchild Semiconductor Fairchild
FAN5018B Datasheet PDF : 30 Pages
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FAN5018B
PRODUCT SPECIFICATION
Electrical Specifications (continued)
(VCC = 12V, TA = 0°C to +85°C and FBRTN=GND, using circuit in Figure 1, unless otherwise noted.)
The denotes specifications which apply over the full operating temperature range.
Parameter
Symbol
Conditions
Min. Typ. Max. Units
DC Gain
( See Note 2)
77
dB
Input Common Mode
Range
CSSUM and CSREF
0
3
V
Positioning Accuracy
Output Voltage Range
Output Current
ΔVFB
IO(CSA)
COMP = FB, Test Circuit 2
-84 -80 -76
mV
ICSCOMP = ±100µA
0.1
3.3
V
FB forced to VOUT – 3% Source/Sink
300 375
µA
Current Balance Circuit
Input Operating Range
VSW(X)CM
Input Resistance
RSW(X)
Input Current
ISW(X)
Input Current Matching
ΔISW(X)
Current Limit Comparator
SW(X) = 0V
SW(X) = 0V
SW(X) = 0V
-600
+200 mV
20
30
40
kΩ
-10 -7
-4
µA
-5
+5
%
ILIMIT Output Voltage
Normal Mode
In Shutdown
Output Current, Normal
Mode
VILIMIT(NM)
VILIMIT(SD)
IILIMIT(NM)
RILIMIT = 250kΩ
IILIMIT = -100µA
RILIMIT = 250kΩ
2.9
3
3.1
V
400 mV
12
µA
Maximum Output Current
Current Limit Threshold VCL
Voltage
VIILIMIT = 3V
VCSREF–VCSCOMP, RILIMIT = 250kΩ
60
µA
105 125 150 mV
Current Limit Setting Ratio
Latch-off Delay Threshold
Latch-off Delay Time
VDELAY
tDELAY
VCL/IILIMIT
In Current Limit
RDELAY = 250kΩ, CDELAY = 4.7nF
10.4
mV/µA
1.7 1.8 1.9
V
600
µs
Soft Start
Output Current,
Soft start Mode
IDELAY(SS)
During Start-up, DELAY < 2.8V
-25 -20 -15
µA
Soft Start Delay Time
TDELAY(SS)
RDELAY = 250kΩ, CDELAY = 4.7nF,
VID = 011111 (1.475V)
400
µs
Enable Input
Input Low Voltage
Input High Voltage
Input Current, EN Low
Input Current, EN High
Power Good Comparator
VIL(EN)
VIH(EN)
IIL(EN)
IIH(EN)
EN = 0V
EN = 1.25V
0.4
V
0.8
V
-1
1
µA
10 25
µA
Under voltage Threshold
Over voltage Threshold
Output Low Voltage
VPWRGD(UV)
VPWRGD(OV)
VOL(PWRGD)
Relative to DAC Output
Relative to DAC Output
IPWRGD(SINK) = 4mA
-325 -250 -200 mV
180 300 400 mV
225 400 mV
Notes:
1. All limits at operating temperature extremes are guaranteed by design, characterization and statistical quality control
2. Guaranteed by design – NOT tested in production.
6
REV. 1.0.0 Jul/15/05
 

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