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FAN4800IMX View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
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FAN4800IMX
Fairchild
Fairchild Semiconductor Fairchild
FAN4800IMX Datasheet PDF : 20 Pages
First Prev 11 12 13 14 15 16 17 18 19 20
16
VEAO
15 VFB
2.5V
0.3V
2 IAC
4 VRMS
3 ISENSE
GAIN
MODULATOR
1
IEAO
Low Power
Detector
3.5k
POWER FACTOR CORRECTOR
VCC
17.9V
VCC OVP
2.78V
TRI-FAULT
PFC OVP
0.5V
-1V
3.5k
PFC CMP
PFC ILIMIT
13
VCC
7.5V
REFERENCE
VREF 14
SQ
R
SQ
R
PFC OUT
12
RAMP1
7
OSCILLATOR
CLK
FAN4800 Rev.02
Figure 7. PFC Section Block Diagram
1.6 Error Amplifier Compensation
The Voltage loop gain(s) is given by:
The PWM loading of the PFC can be modeled as a neg-
ative resistor because an increase in the input voltage to
the PWM causes a decrease in the input current. This
response dictates the proper compensation of the two
transconductance error amplifiers.
Figure 8 shows the types of compensation networks
most commonly used for the voltage and current error
amplifiers, along with their respective return points. The
current-loop compensation is returned to VREF to pro-
duce a soft-start characteristic on the PFC: As the refer-
ence voltage increases from 0V, it creates a
differentiated voltage on IEAO, which prevents the PFC
from immediately demanding a full duty cycle on its
boost converter.
= ΔVOUT × ΔVFB × ΔVEAO
(6)
ΔVEAO ΔVOUT ΔVFB
PIN × 2.5V
V
2
OUTDC
×
ΔVEAO
×
S
× CDC
× GMV
× ZC
where:
ZC:
Compensation network for the voltage loop.
GMV: Transconductance of VEAO.
PIN:
Average PFC input power.
V2OUTDC: PFC boost output voltage (typical designed
value is 380V).
1.7 PFC Voltage Loop
CDC:
PFC boost output capacitor.
There are two major concerns when compensating the
voltage loop error amplifier (VEAO); stability and transient
response. Optimizing interaction between transient
response and stability requires that the error amplifier’s
open-loop crossover frequency half that of the line fre-
quency, or 23Hz for a 47Hz line (lowest anticipated inter-
national power frequency). The gain vs. input voltage of
the FAN4800’s voltage error amplifier (VEAO) has a spe-
cially shaped non-linearity, so that under steady-state
operating conditions, the transconductance of the error
amplifier is at a local minimum. Rapid perturbation in line
or load conditions causes the input to the voltage error
amplifier (VFB) to deviate from its 2.5V (nominal) value. If
this happens, the transconductance of the voltage error
amplifier increases significantly, as shown in the Figure
4. This raises the gain-bandwidth product of the voltage
loop, resulting in a much more rapid voltage loop
response to such perturbations than would occur with
conventional linear gain characteristics.
1.8 PFC Current Loop
The compensation of the current amplifier (IEAO) is simi-
lar to that of the voltage error amplifier (VEAO) with the
exception of the choice of crossover frequency. The
crossover frequency of the current amplifier should be at
least ten times that of the voltage amplifier to prevent
interaction with the voltage loop. It should also be limited
to less than one sixth of the switching frequency, e.g.,
16.7kHz for a 100kHz switching frequency.
The current loop gain(s) is given by:
= ΔVISENSE × ΔDOFF × ΔIEAO
(7)
ΔDOFF
ΔIEAO ΔVISENSE
VOUTDC × RS
S × L × 2.5V
× GMI
× ZCI
© 2005 Fairchild Semiconductor Corporation
FAN4800 Rev. 1.0.5
11
www.fairchildsemi.com
 

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