FAN1540D18X View Datasheet(PDF) - Fairchild Semiconductor
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FAN1540D18X Datasheet PDF : 15 Pages
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Applications Information
General Circuit Description
The FAN1539/FAN1540 is an advanced low dropout volt-
age regulator, specially designed for applications in por-
table computers, where high performance and low
quiescent current are required. The device has an inter-
nal trimmed bandgap voltage reference and an internal
output voltage sense divider. These two signals form the
input to the error amplifier which regulates the output
voltage.
The FAN1539/FAN1540 has a complete set of internal
protection circuitry including thermal shutdown, short cir-
cuit current limit and electrostatic discharge protection.
Low ESR ceramic capacitors are needed for input as
well as output pins to maintain the circuit stability.
Short Circuit Current Limit
The device has internal over-current limit and short cir-
cuit protection. Under over-current conditions the device
current is determined by the current limit threshold. Once
the device is released from short circuit conditions, the
normal level of current limit is gradually re-established as
the device output voltage reaches normal levels. Special
circuitry has been added to ensure that recovery from
short circuit current conditions does not lead to exces-
sive overshoot of the output voltage — a phenomenon
often encountered in conventional regulators.
Thermal Protection
The FAN1539/FAN1540 is designed to supply at least
1A/1.3A output currents. Excessive output load at high
input-output voltage difference will cause the device tem-
perature to increase and exceed maximum ratings due
to power dissipation. During output overload conditions,
when the die temperature exceeds the shutdown limit
temperature of 160°C, an onboard thermal protection will
disable the output until the temperature drops approxi-
mately 15°C below the limit, at which point the output is
re-enabled.
Thermal Characteristics
The FAN1539/FAN1540 is designed to supply at least
1A/1.3A at the specified output voltage with an operating
die (junction) temperature of up to 125°C. Once the
power dissipation and thermal resistance is known, the
maximum junction temperature of the device can be cal-
culated. While the power dissipation is calculated from
known electrical parameters, the actual thermal resis-
tance depends on the thermal characteristics of the cho-
sen package and the surrounding PC board copper to
which it is mounted.
The power dissipation is equal to the product of the
input-to-output voltage differential and the output current
plus the ground current multiplied by the input voltage,
or:
PD = (VIN – VOUT)IOUT + VINIGND
The ground pin current, IGND can be found in the charts
provided in the “Electrical Characteristics” section.
The relationship describing the thermal behavior of the
package is:
PD(max)
=
T----J---(--m---θ-a---Jx--A-)---–----T----A--
where TJ(max) is the maximum allowable junction temper-
ature of the die, which is 150°C, and TA is the ambient
operating temperature. θJA is dependent on the sur-
rounding PC board layout and can be empirically
obtained. While the θJC (junction-to-case) of the 6-lead
MLP package is specified at 8°C /W, the θJA for a mini-
mum PWB footprint will be in substantially higher. This
can be improved upon by providing a heat sink of sur-
rounding copper ground on the PWB. Depending on the
size of the copper area, and the thickness of the copper
layer, the resulting θJA can vary over a wide range. The
addition of backside copper with through-holes, stiffen-
ers, and other enhancements can also aid in reducing
thermal resistance. Thermal simulations performed on
a thermally optimized board layout indicate that θJA
as low as 20°C /W can be achieved. For example, the
heat contributed by the dissipation of other devices
located nearby must be included in the design consider-
ations.
Overload conditions also need to be considered. It is
possible for the device to enter a thermal cycling loop, in
which the circuit enters a shutdown condition, cools, re-
enables, and then again overheats and shuts down
repeatedly due to a persistent fault condition.
Capacitor ESR and Printed Circuit Board
Layout
The FAN1539/FAN1540 has been optimized to accom-
modate low ESR bypass capacitors down to 0 mΩ.
For best results it is important to place both input and
output bypass capacitors as near to the input and
output pins as possible. Use of X7R types such as
Murata’s GRM31CR70J106KA01B (10µF) and
GRM43ER71A226KE01B (22µF) or similar compo-
nent from TDK. The capacitors should connect directly
to the ground plane. Use of ground plane on the top and
the bottom side of the PCB is recommended. As many
vias as possible should be used to minimize ground
plane resistance.
11
FAN1539/FAN1540 Rev. 1.1.1
www.fairchildsemi.com
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