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EN29LV160A View Datasheet(PDF) - Eon Silicon Solution Inc.

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EN29LV160A Datasheet PDF : 43 Pages
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Table 12. AC CHARACTERISTICS
EN29LV160A
Read-only Operations Characteristics
Parameter
Symbols
JEDEC Standard
tAVAV
tRC
Description
Read Cycle Time
Test
Setup
Speed Options
-70
-90 Unit
Min
70
90
ns
tAVQV
tELQV
tACC
tCE
Address to Output Delay
CE# = VIL Max
70
OE#= VIL
Chip Enable To Output Delay
OE#= VIL Max
70
90
ns
90
ns
tGLQV tOE
Output Enable to Output Delay
Max
30
35
ns
tEHQZ tDF
Chip Enable to Output High Z
Max
20
20
ns
tGHQZ tDF
Output Enable to Output High Z
Max
20
20
ns
tAXQX tOH
Output Hold Time from
Addresses, CE# or OE#,
whichever occurs first
Min
0
0
ns
Notes:
For - 70
For all others:
Vcc = 3.0V ± 5%
Output Load : 1 TTL gate and 30pF
Input Rise and Fall Times: 5ns
Input Rise Levels: 0.0 V to 3.0 V
Timing Measurement Reference Level, Input and Output: 1.5 V
Vcc = 2.7V – 3.6V
Output Load: 1 TTL gate and 100 pF
Input Rise and Fall Times: 5 ns
Input Pulse Levels: 0.45 V to .8 x Vcc
Timing Measurement Reference Level, Input and Output: 0.8 V and .7 x Vcc
Addresses
CE#
OE#
WE#
Outputs
Reset#
RY/BY#
0V
tOEH
tRC
Addresses Stable
tACC
tDF
tOE
tCE
tOH
Output Valid
HIGH Z
Figure 5. AC Waveforms for READ Operations
This Data Sheet may be revised by subsequent versions 29 ©2004 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2005/01/07
 

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