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EN29LV160AB-70TC View Datasheet(PDF) - Eon Silicon Solution Inc.

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EN29LV160AB-70TC Datasheet PDF : 43 Pages
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Table 10. Status Register Bits
EN29LV160A
DQ
Name
Logic Level
Definition
‘1’
Erase Complete or
erase Sector in Erase suspend
‘0’
Erase On-Going
7
DATA#
POLLING
DQ7
Program Complete or
data of non-erase Sector
during Erase Suspend
DQ7#
Program On-Going
‘-1-0-1-0-1-0-1-’ Erase or Program On-going
6
TOGGLE
BIT
DQ6
Read during Erase Suspend
‘-1-1-1-1-1-1-1-‘
Erase Complete
5
ERROR BIT
‘1’
Program or Erase Error
‘0’
Program or Erase On-going
ERASE
3
TIME BIT
‘1’
Erase operation start
‘0’
Erase timeout period on-going
Chip Erase, Erase or Erase
suspend on currently
addressed
Sector. (When DQ5=1, Erase
2
TOGGLE
BIT
‘-1-0-1-0-1-0-1-’
Error due to currently
addressed Sector. Program
during Erase Suspend on-
going at current address
DQ2
Erase Suspend read on
non Erase Suspend Sector
Notes:
DQ7 DATA# Polling: indicates the P/E status check during Program or Erase, and on completion before checking bits DQ5
for Program or Erase Success.
DQ6 Toggle Bit: remains at constant level when P/E operations are complete or erase suspend is acknowledged.
Successive reads output complementary data on DQ6 while programming or Erase operation are on-going.
DQ5 Error Bit: set to “1” if failure in programming or erase
DQ3 Sector Erase Command Timeout Bit: Operation has started. Only possible command is Erase suspend (ES).
DQ2 Toggle Bit: indicates the Erase status and allows identification of the erased Sector.
This Data Sheet may be revised by subsequent versions 19 ©2004 Eon Silicon Solution, Inc., www.essi.com.tw
or modifications due to changes in technical specifications.
Rev. C, Issue Date: 2005/01/07
 

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