DS4412UR View Datasheet(PDF) - Maxim Integrated
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| DS4412UR Datasheet PDF : 0 Pages | |||
Dual-Channel, I2C Adjustable
Sink/Source Current DAC
OUTPUT CURRENT CHARACTERISTICS (continued)
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C.)
PARAMETER
SYMBOL
CONDITIONS
Output-Current Variation due to
Output Voltage Change
Output Leakage Current at Zero
Current Setting
IZERO
DC source, VOUT measured at 1.2V
DC sink, VOUT measured at 1.2V
Output-Current Differential
Linearity
DNL
(Note 6)
Output-Current Integral Linearity
INL
(Note 7)
MIN TYP MAX UNITS
-0.02
%/V
+0.12
-1
+1
μA
0.5
LSB
1
LSB
I2C AC ELECTRICAL CHARACTERISTICS
(VCC = +2.7V to +5.5V, TA = -40°C to +85°C.)
PARAMETER
SCL Clock Frequency
Bus Free Time Between STOP
and START Conditions
SYMBOL
fSCL
tBUF
(Note 8)
CONDITIONS
MIN TYP MAX UNITS
0
400
kHz
1.3
µs
Hold Time (Repeated) START
Condition
tHD:STA
0.6
µs
Low Period of SCL
High Period of SCL
Data Hold Time
Data Setup Time
START Setup Time
SDA and SCL Rise Time
tLOW
tHIGH
tDH:DAT
tSU:DAT
tSU:STA
tR
(Note 9)
1.3
0.6
0
100
0.6
20 +
0.1CB
µs
µs
0.9
µs
ns
µs
300
ns
SDA and SCL Fall Time
STOP Setup Time
SDA and SCL Capacitive Loading
tF
tSU:STO
CB
(Note 9)
(Note 9)
20 +
0.1CB
0.6
300
ns
µs
400
pF
Note 1: All voltages with respect to ground, currents entering the IC are specified positive and currents exiting the IC are negative.
Note 2: Supply current specified with all outputs set to zero current setting with all inputs driven to well-defined logic levels. SDA and
SCL are connected to VCC. Excludes current through RFS resistors (IRFS). Total current includes ICC + 2.5 x (IRFS0 + IRFS0).
Note 3: The output voltage range must be satisfied to ensure the device meets its accuracy and linearity specifications.
Note 4: Input resistors RFS must be between 2.25kΩ and 9.0kΩ to ensure the device meets its accuracy and linearity specifications.
Note 5: Temperature drift excludes drift caused by external resistor.
Note 6: Differential linearity is defined as the difference between the expected incremental current increase with respect to position
and the actual increase. The expected incremental increase is the full-scale range divided by 15.
Note 7: Integral linearity is defined as the difference between the expected value as a function of the setting and the actual value.
The expected value is a straight line between the zero and the full-scale values proportional to the setting.
Note 8: Timing shown is for fast-mode (400kHz) operation. This device is also backward compatible with I2C standard-mode timing.
Note 9: CB—total capacitance of one bus line in pF.
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