DS1864 View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated

Part Name

Description

View to exact match

DS1864

SFP Laser Controller and Diagnostic IC

Dallas Semiconductor -> Maxim Integrated 

SFP Laser Controller and

Diagnostic IC

NONVOLATILE MEMORY CHARACTERISTICS

(VCC = 2.97V to 5.5V, TA = -40°C to +95°C.)

PARAMETER

EEPROM Writes

SYMBOL

CONDITIONS

+70°C (Note 17)

MIN TYP

50,000

MAX

UNITS

Writes

Note 1: All voltages are referenced to ground. Currents into the IC are positive, and currents out of the IC are negative.

Note 2: Supply current is measured with all logic inputs at their inactive state (SDA = SCL = VCC) and driven to well-defined logic

levels. All outputs are disconnected.

Note 3: DAC0/DAC1 positions programmed to FFh and with outputs floating.

Note 4: Full-scale is user programmable. The maximum voltage that the MON inputs read is approximately full-scale, even if the

voltage on the inputs is greater than full-scale.

Note 5: This voltage defines the maximum range of the analog-to-digital (ADC) converter voltage, not the maximum VCC voltage.

Note 6: Accuracy specification includes supply and temperature variations. Measured at 1.2V.

Note 7: %FS refers to calibrated full scale in the case of internal calibration, and uncalibrated full scale in the case of external cali-

bration. Uncalibrated full scale is set at the factory and is specified in this data sheet as VCC FS (Factory), MON1 FS

(Factory), MON2 FS (Factory), and MON3 FS (Factory). Calibrated full scale is set by the user, allowing him to change any

of these scales for his instrumentation.

Note 8: When used single-ended, MON1N must be connected to GND.

Note 9: 0.5%FS with 0.5dB (~11%) accuracy results in 16.4dB range. Assuming some overlap of the ranges, this scheme should

cover the required 26dB range.

Note 10: See Figure 14 for thermometer error.

Note 11: When the DACs are re-enabled, they ramp up to their final values. The ramp up starts from 0 and should not exceed its

final value at any point during its initial transient.

Note 12: This spec is the time it takes, from RSSI voltage below the RSSI voltage trip threshold, to LOS asserted high.

Note 13: Measured from the falling clock edge after the stop bit of the write transaction.

Note 14: I2C interface timing shown for is for fast-mode (400kHz) operation. This device is also backward-compatible with I2C stan-

dard-mode timing.

Note 15: CB⎯total capacitance of one bus line in picofarads.

Note 16: EEPROM write begins after a stop condition occurs.

Note 17: This parameter is guaranteed by design.

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