datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

DS1864 View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated

Part Name
Description
View to exact match
DS1864
Dallas
Dallas Semiconductor -> Maxim Integrated Dallas
DS1864 Datasheet PDF : 72 Pages
First Prev 41 42 43 44 45 46 47 48 49 50 Next Last
SFP Laser Controller and
Diagnostic IC
Table 04h (Table 01h in DS1859 Configuration), 88h: Configuration And Status
FACTORY DEFAULT:
00h
MEMORY TYPE:
Shadowed Memory (SEE)
88h
IN1C
X
INV1
FT_latch
DAC1R
bit7
DAC0R
Alatch
Wlatch
bit0
IN1C: Software control bit for IN1 value.
bit7
0 = No interrupt is generated on OUT1.
1 = An interrupt is generated on OUT1.
bit6
No function.
INV1: Allows inversion of OUT1 pin value. OUT1=INV1[(IN1C)OR(IN1S)], where IN1S is from register 6Eh.
bit5
0 = No interrupt is generated.
1 = An interrupt is generated.
FT_latch: Configures fast-trip flags to be latched or unlatched.
bit4
0 = Fast-trip flags unlatched.
1 = Fast-trip flags latched. They will clear when written to 0’s.
DAC1R: Range select for DAC1.
bit3
0 = The 0.5mA range is selected.
1 = The 1.5mA range is selected.
DAC0R: Range select for DAC0.
bit2
0 = The 0.5mA range is selected.
1 = The 1.5mA range is selected.
Alatch: Alarm Latch. Configures alarm flags to be latched or unlatched.
bit1
0 = Alarm flags unlatched.
1 = Alarm flags latched. They will clear when written to 0s.
Wlatch: Warning Latch. Configures warning flags to be latched or unlatched.
bit0
0 = Warning flags unlatched.
1 = Warning flags latched. They will clear when written to 0s.
48 ____________________________________________________________________
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]