datasheetbank_Logo   Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site
Part Name :   

54LS109DMQB View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
54LS109DMQB Dual Positive-Edge-Triggered J-K Flip-Flops with Preset, Clear, and Complementary Outputs National-Semiconductor
National ->Texas Instruments National-Semiconductor
54LS109DMQB Datasheet PDF : 6 Pages
1 2 3 4 5 6
Electrical Characteristics over recommended operating free air temperature range (unless otherwise noted)
Symbol
VI
VOH
VOL
II
IIH
IIL
IOS
ICC
Parameter
Input Clamp Voltage
High Level Output
Voltage
Low Level Output
Voltage
Input Current Max
Input Voltage
High Level Input
Current
Low Level Input
Current
Short Circuit
Output Current
Supply Current
Conditions
VCC e Min II e b18 mA
VCC e Min IOH e Max
VIL e Max VIH e Min
VCC e Min IOL e Max
VIL e Max VIH e Min
IOL e 4 mA VCC e Min
VCC e Max
VI e 7V
VCC e Max
VI e 2 7V
VCC e Max
VI e 0 4V
VCC e Max
(Note 2)
VCC e Max (Note 3)
DM54
DM74
DM54
DM74
DM74
JK
Clock
Preset
Clear
JK
Clock
Preset
Clear
JK
Clock
Preset
Clear
DM54
DM74
Min
25
27
b20
b20
Typ
(Note 1)
34
34
0 25
0 35
0 25
4
Max
b1 5
04
05
04
01
01
02
02
20
20
40
40
b0 4
b0 4
b0 8
b0 8
b100
b100
8
Units
V
V
V
mA
mA
mA
mA
mA
Switching Characteristics at VCC e 5V and TA e 25 C (See Section 1 for Test Waveforms and Output Load)
Symbol
Parameter
From (Input)
To (Output)
RL e 2 kX
CL e 15 pF
CL e 50 pF
Min
Max
Min
Max
Units
fMAX
Maximum Clock
Frequency
25
20
MHz
tPLH
Propagation Delay Time
Clock to
Low to High Level Output
Q or Q
25
35
ns
tPHL
Propagation Delay Time
Clock to
High to Low Level Output
Q or Q
30
35
ns
tPLH
Propagation Delay Time
Low to High Level Output
Clear
to Q
25
35
ns
tPHL
Propagation Delay Time
High to Low Level Output
Clear
to Q
30
35
ns
tPLH
Propagation Delay Time
Preset
Low to High Level Output
to Q
25
35
ns
tPHL
Propagation Delay Time
Preset
High to Low Level Output
to Q
30
35
ns
Note 1 All typicals are at VCC e 5V TA e 25 C
Note 2 Not more than one output should be shorted at a time and the duration should not exceed one second For devices with feedback from the outputs where
shorting the outputs to ground may cause the outputs to change logic state an equivalent test may be performed where VO e 2 25V and 2 125V for DM54 and
DM74 series respectively with the minimum and maximum limits reduced by one half from their stated values This is very useful when using automatic test
equipment
Note 3 ICC is measured with all outputs open with CLOCK grounded after setting the Q and Q outputs high in turn
3
Direct download click here
 

Share Link : National-Semiconductor
All Rights Reserved © datasheetbank.com 2014 - 2019 [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]