DAC1627D1G25 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
View to exact match
DAC1627D1G25
NXP Semiconductors.
DAC1627D1G25 Datasheet PDF : 69 Pages
| |||
NXP Semiconductors
6. Pinning information
6.1 Pinning
DAC1627D1G25
Dual 16-bit DAC: up to 1.25 Gsps; x2, x4 and x8 interpolating
terminal 1
index area
CLKP 1
CLKN 2
MDSP 3
MDSN 4
TM 5
ALIGNP 6
ALIGNN 7
LD[15]P 8
LD[15]N 9
LD[14]P 10
LD[14]N 11
VDDD(1V8) 12
LD[13]P 13
LD[13]N 14
LD[12]P 15
LD[12]N 16
LD[11]P 17
LD[11]N 18
DAC1627D1G25
54 RESET_N
53 SCS_N
52 SCLK
51 SDIO
50 SDO
49 IO0
48 IO1
47 LD[0]N
46 LD[0]P
45 LD[1]N
44 LD[1]P
43 VDDD(1V8)
42 LD[2]N
41 LD[2]P
40 LD[3]N
39 LD[3]P
38 LD[4]N
37 LD[4]P
001aan828
Fig 2. Pin configuration
Transparent top view
6.2 Pin description
Table 2.
Symbol
CLKP
CLKN
MDSP
MDSN
TM
ALIGNP
ALIGNN
LD[15]P
LD[15]N
Pin description
Pin
Type[1]
1
I
2
I
3
IO
4
IO
5
I
6
I
7
I
8
I
9
I
Description
DAC clock positive input
DAC clock negative input
multi-device synchronization positive signal
multi-device synchronization negative signal
Test mode selection (connect to GND)
positive input for data alignment
negative input for data tanglement
LVDS positive input bit 15[2]
LVDS negative input bit 15[2]
DAC1627D1G25
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 29 April 2011
© NXP B.V. 2011. All rights reserved.
4 of 69
|
|
Share Link: