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DAC1627D1G25 View Datasheet(PDF) - NXP Semiconductors.

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DAC1627D1G25 Datasheet PDF : 69 Pages
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10.18.2 Page 0 register allocation map
Table 23 shows an overview of all registers on page 0 (00h in hexadecimal). See Section 10.18.3 for detailed descriptions of
the registers.
Table 23. Page_00 register allocation map
Address Register name
R/W
Bit definition
Default
Bit 7
Bit 6
Bit 5 Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 Bin Hex Dec
0 00h COMMON
R/W 3W_SPI SPI_RST
-
-
-
CODING IC_PON GAP_PON 1000 87h 135
0111
1 01h TXCFG
R/W NCO_ON NCO_LP INV_SIN
_SEL
_SEL
MODULATION[2:0]
INTERPOLATION[1:0] 0000 01h 1
0001
2 02h PLLCFG
R/W PLL_BP PLL_BUF PLL_PLL
_PD
_PD
PLL_DIV[1:0]
PLL_PHASE[1:0]
PLL_ 1010 A1h 161
OSC_PD 0001
4 04h FREQNCO_B0
R/W
FREQ_NCO[7:0]
0110 66h 102
0110
5 05h FREQNCO_B1
R/W
FREQ_NCO[15:8]
0110 66h 102
0110
6 06h FREQNCO_B2
R/W
FREQ_NCO[23:16]
0110 66h 102
0110
7 07h FREQNCO_B3
R/W
FREQ_NCO[31:24]
0010 66h 102
0110
8 08h FREQNCO_B4
R/W
FREQ_NCO[39:32]
0010 26h 38
0110
9 09h PH_CORR_CTL0
R/W
PHASE_COR[7:0]
0000 00h 0
0000
10 0Ah PH_CORR_CTL1
R/W PH_COR
-
-
_ENA
PHASE_COR[12:8]
0000 00h 0
0000
11 0Bh DAC_A_DGAIN_LSB R/W
DAC_A_DGAIN[7:0]
1101 50h 80
0100
12 0Ch DAC_A_DGAIN_MSB R/W
-
-
-
-
DAC_A_DGAIN[11:8]
0000 0Bh 11
1011
13 0Dh DAC_B_DGAIN_LSB R/W
DAC_B_DGAIN[7:0]
1101 50h 80
0100
14 0Eh DAC_B_DGAIN_MSB R/W
-
-
-
-
DAC_B_DGAIN[11:8]
0000 0Bh 11
0010
15 0Fh DAC_OUT_CTRL
R/W
-
-
-
- A_DGAIN_E B_DGAIN_E MINUS CLIPPING 0000 00h 0
_3DB
_ENA 0000
 

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