TSA5522 View Datasheet(PDF) - Philips Electronics

Part Name

Description

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TSA5522

1.4 GHz I2C-bus controlled synthesizer

Philips Electronics 

Philips Semiconductors

1.4 GHz I2C-bus controlled synthesizer

Product specification

TSA5522

Flock flag (FL) definition

When the LOCK output is LOW the maximum frequency

deviation (∆f) from stable frequency can be expressed as

follows: ∆f = ±-K---K-V---CO----O-- × ICP × --((--CC-----11-----+×----CC-----22----))-

where:

Kvco = oscillator slope Hz/V

ICP = charge-pump current (A)

KO = 4 × 10E6

C1, C2 = loop filter capacitors.

In the application:

KVCO = 16 MHz/V (UHF band)

ICP = 250 µA

C1 = 180 nF, C2 = 39 nF

∆f = ±31.2 kHz.

handbook, halfpage

C2

C1

R

MBE331

Fig.7 Loop filter.

Table 9 LOCK output / FL flag setting

DESCRIPTION

CONDITION

Time span between actual phase lock and LOCK bit is LOW RSA = 1; RSB = 1

(or FL flag = 1)

RSA = 1; RSB = 1

RSB = 0

Time span between the loop losing lock and LOCK bit is

HIGH or (FL flag = 0)

MIN.

1 024

2 048

1 280

0

MAX.

1 152

2 304

1 440

300

UNIT

µs

µs

µs

µs

1996 Jan 23

14

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