SA7026DK View Datasheet(PDF) - Philips Electronics
Part Name
Description
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SA7026DK Datasheet PDF : 14 Pages
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Philips Semiconductors
1.3GHz low voltage fractional-N dual synthesizer
Objective specification
SA7026
Data format
Table 1. Format of programmed data
LAST IN
p23
p22
MSB
p21
Table 2. A word, length 24 bits
SERIAL PROGRAMMING FORMAT
p20
../..
../..
p1
FIRST IN LSB
p0
LAST IN
MSB
LSB FIRST IN
Address fmod Fractional-N Main Divider ratio
Spare
0
0
FM NF2 NF1 NF0 N15 N14 N13 N12 N11 N10 N9 N8 N7 N6 N5 N4 N3 N2 N1 N0 SK1 SK2
Default:
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
A word select
Fixed to 00.
Fractional Modulus select
FM 0 = modulo 8, 1 = modulo 5.
Fractional-N Increment
NF2..0 Fractional N Increment values 000 to 111.
N-Divider
N0..N15, Main divider values 512 to 65535 allowed for divider ratio.
Table 3. B word, length 24 bits
ADDRESS
REFERENCE DIVIDER
LOCK
PD
FRACTIONAL COMPENSATION DAC
0
1
R9 R8 R7 R6 R5 R4 R3 R2 R1 R0 L1 L0 Main Aux FC7 FC6 FC5 FC4 FC3 FC2 FC1
FC0
Default:
0
0
0
1
0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
0
0
0
B word select
Fixed to 01
R-Divider
R0..R9, Reference divider values 4 to 1023 allowed for divider ration.
Lock detect output
L1 L0
0 0 Combined main, aux. lock detect signal present at the LOCK pin (push/pull).
0 1 Combined main, aux, lock detect signal present at the LOCK pin (open drain).
1 0 Main lock detect signal present at the LOCK pin.
1 1 Auxiliary loop lock detect signal present at the LOCK pin.
When auxiliary loop and main loop are in power down mode, the lock indicator is low.
Power down
Main = 1: power to N-divider, reference divider, main charge pumps, Main = 0 to power down.
Aux = 1: power to Aux divider, reference divider, aux charge pump, Aux = 0 to power down.
Fractional Compensation
FC7..0 Fractional Compensation charge pump current DAC, values 0 to 255. Recommended values: FC = 80 for
MOD 8; FC = 128 for MOD 5.
Table 4. C word, length 24 bits
Address
Auxiliary Divider
CP
SM
SA
1
0
A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0 CP1 CP0 SM2 SM1 SM0 SA2 SA1
SA0
Default
0
0
0
0
0
1
1
1
0
0
1
0
1
0
1
1
0
0
0
0
0
0
C word select
Fixed to 10
A-Divider
A0..A13, Auxiliary divider values 128 to 16384 allowed for divider ratio.
Charge pump current Ratio CP1, CP0: Charge pump current ratio, see table of charge pump currents.
Main comparison select
SM comparison divider select for main phase detector.
Aux comparison select
SA Comparison divider select for auxiliary phase detector.
Table 5. D word, length 24 bits
ADDRESS
SYNTHESIZER TEST
BITS
SYNTHESIZER TEST BITS
1 1 0 – – – – – Tspu – – – – – – – – – – – – – – –
DEFAULT
000000000000000000000
Tspu: Speed up
Forces the synthesizer charge pump in speed-up mode all the time.
NOTE: All test bits must be set to 0 for normal operation.
1998 Oct 13
12
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