CXP85112B/85116B, CXP85220A/85224A/85228A/85232A
Input/Output Circuit Formats for Pins
Pin
PA0 to PA7
PB0 to PB7
PC0 to PC7
Port A
Port B
Port C
Circuit format
Data for Ports
A, B, and C
Direction for
Ports A, B, and C
24 pins
Data bus
RD (Ports A, B, and C)
When reset
IP
Input protection
circuit
Hi-Z
Port D
PD0/INT2
PD3/SI
PD4/HSI
PD5/ACI
PD6/RMC
PD7/EC
6 pins
Port D data
Port D direction
Data bus
RD (Port D)
INT2, SI, HSI, ACI, RMC, EC
Port D
Schmitt input
High current
12mA
IP
Hi-Z
SCK or SO
Output eneble
PD1/SCK
PD2/SO
2 pins
Port D data
Port D direction
Data bus
RD (Port D)
SCK only
–7–
High current
12mA
IP
Hi-Z
Schmitt input