CXP82940/82948/82952/82960
Pin
PD0/S0
to
PD7/S7
8 pins
Port D
Segment output data
Output selection
control signal
("0" when reset)
Port D data
Data bus
RD (Port D)
Circuit format
When reset
∗ High voltage drive transistor
∗
OP Mask option
Pull-down
transistor
VFDP
Hi-Z or
Low level
(when PD
resistor is
connected)
S8 to S11
T15/S12
to
T8/S19
T0 to T7
20 pins
Segment output data
Timing output data
Output selection
control signal
("0" when reset)
∗ High voltage drive transistor
∗
OP
Pull-down
resistor
Mask option
VFDP
Hi-Z or
Low level
(when PD
resistor is
connected)
EXTAL
XTAL
EXTAL
2 pins
XTAL
TEX
TEX
TX
2 pins
TX
RST
1 pin
• Diagram shows circuit
composition during oscillation.
IP
IP
• Feedback resistor is removed
during stop, and XTAL
becomes High.
Oscillation
•Diagram shows circuit
composition during oscillation.
IP
IP
•When the operation of the oscillation
circuit is stopped by the software,
the feedback resistor is removed,
and TEX becomes Low level and TX
becomes High level.
Oscillation
Pull-up resistor
OP
Mask option
IP
Schmitt input
Low level
–9–