CXP82940/82948/82952/82960
I/O Circuit Format for Pins
Pin
Circuit format
When reset
Port A
∗
Pull-up resistor
"0" when reset
Port A data
PA0/AN0
to
PA7/AN7
8 pins
Port A direction
"0" when reset
Data bus
RD (Port A)
Port A input
selection
"0" when reset
A/D converter
IP Input
protection
circuit
Input multiplexer
∗ Pull-up transistor approx. 100kΩ
Hi-Z
PB1/CS0
PB3/SI0
PB6/SI1
3 pins
PB2/SCK0
PB5/SCK1
2 pins
Port B
∗
Pull-up resistor
"0" when reset
Port B data
Port B direction
"0" when reset
Data bus
IP
Schmitt input
RD (Port B)
CS0
SI0
SI1
∗ Pull-up transistor approx. 100kΩ
Not Schmitt input for SI0 and SI1.
Port B
∗
Pull-up resistor
"0" when reset
SCK OUT
Output enable
Port B output
selection
"0" when reset
Port B data
IP
Port B direction
"0" when reset
Data bus
RD (Port B)
SCK in
Schmitt input
∗ Pull-up transistor approx. 100kΩ
Hi-Z
Hi-Z
–6–