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CXP750096 View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
View to exact match
CXP750096
Sony
Sony Semiconductor Sony
CXP750096 Datasheet PDF : 25 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CXP750096/750010, CXP750097/750011
Input/Output Circuit Formats for Pins
Pin
Port A
Circuit format
Port A data
PA0/AN0
to
PA5/AN5
6 pins
Port A direction
“0” after a reset
Internal data bus
RD (Port A)
Port A function selection
“0” after a reset
A/D converter
Input multiplexer
After a reset
IP
Input
protection
circuit
Hi-Z
Port A
Port A data
PA6/VSYNC
PA7/HSYNC
Port A direction
“0” after a reset
Internal data bus
RD (Port A)
Schmitt input IP
2 pins
HSYNC, VSYNC
PB0 to PB7
PC0 to PC52
PG3 to PG62
PG7/INT1
Port B
Port C
Port G
Ports B, C, G data
Ports B, C, G direction
“0” after a reset
Internal data bus
RD (Ports B, C, G)
Input polarity
“0” after a reset
PB0 to PB2
Schmitt input only
for PG7
IP
19 pins
INT1
Hi-Z
Hi-Z
PC6/PWM62
PC7/PWM72
PF0/PWM0
to
PF3/PWM3
Port C
Port F
PWM0 to PWM3
PWM6, PWM7
Ports C and F
function selection
“0” after a reset
Ports C and F data
“1” after a reset
6 pins
Internal data bus
RD (Ports C, F)
2 Not incorporated for Pin 52 package.
–8–
1
1 12V drive voltage
Large current 12mA
Hi-Z
 

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