|CXK5T8512TN-12LLX||65536-word × 8-bit High Speed CMOS Static RAM|
|CXK5T8512TN-12LLX Datasheet PDF : 10 Pages |
• Write cycle (3) : CE2 control
∗1 Write is executed when both CE1 and WE are at low and CE2 is at high simultaneously.
∗2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.
∗3 tWR1 is tested from either the rising edge of CE1 or the falling edge of CE2, whichever comes earlier, until
the end of the write cycle.
|Direct download click here|
|Share Link :|