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CXK5T16100TM- View Datasheet(PDF) - Sony Semiconductor

Part NameDescriptionManufacturer
CXK5T16100TM- 65536-word × 16-bit High Speed CMOS Static RAM Sony
Sony Semiconductor Sony
CXK5T16100TM- Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Write cycle (3) : UB, LB control
Address
OE
CE
tAS
UB, LB
WE
Data in
Data out
CXK5T16100TM
tWC
tAW
tCW
tBW
tWR1 (3)
tWP
tDW
tDH
Data valid
High impedance
1 Write is executed when all of the CE, WE and (UB and, or LB) are at low simultaneously.
2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition.
3 tWR1 (for I/O1 to 8) is tested from either the rising edge of CE or LB, whichever comes earlier, until the end
of the write cycle.
tWR1 (for I/O9 to 16) is tested from either the rising edge of CE or UB, whichever comes earlier, until the end
of the write cycle.
–8–
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