CXA1315M/P
• I2C data write (Write from I2C controller to IC)
SDA
MSB
At "L" during write
Hi-Z
MSB
LSB
Hi-Z
SCL
S
MSB
1
2
3
4
5
6
7
8
9
1
8
9
LSB
Hi-Z
Address
Hi-Z
ACK
Sub Address
ACK
1
8
9
1
8
9
DATA (n)
ACK
DATA (n + 1)
ACK
DATA (n + 2)
Hi-Z
Hi-Z
8
9
1
8
9
DATA
ACK
DATA
ACK
∗ The number of data that can be
transferred at a time is confined to
units of 8-bit that can be set as required.
Sub Address is incremented automatically.
P
• I2C data read (Read from IC to I2C controller)
At "H" during read
Hi-Z
SDA
SCL
1
S
6
7
8
9
1
Address
ACK
7
8
9
DATA
P
ACK
• Read timing
MSB
LSB
IC output SDA
SCL
9
1
2
3
4
5
6
7
8
9
Read timing ACK
∗ Data read is performed with SCL rise.
DATA
–8–
ACK