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TSA5521T/C5 View Datasheet(PDF) - Philips Electronics

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Description
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TSA5521T/C5 Datasheet PDF : 24 Pages
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Philips Semiconductors
1.3 GHz universal bus-controlled
TV synthesizer
Product specification
TSA5520; TSA5521
Table 2 Bus format selection
PIN
NAME
11
SW
13
SCL
14
SDA
15
CE
3-WIRE BUS MODE
open or HIGH
clock input
data input
chip enable input
I2C BUS MODE
LOW
SCL input
SDA input/output
address selection input
Table 3 I2C-bus data format
BYTE
MSB
DATA BYTE
LSB
Address Byte (ADB)
1
1
0
0
0 MA1 MA0 0
Divider Byte 1 (DB1)
0 N14 N13 N12 N11 N10 N9 N8
Divider Byte 2 (DB2) N7 N6 N5 N4 N3 N2 N1 N0
Control Byte (CB)
1
CP T2
T1
T0 RSA RSB OS
Band switch Byte (BB) X
X
X
X BS4 BS3 BS2 BS1
SLAVE ANSWER
A
A
A
A
A
Table 4 Description of Table 3
SYMBOL
A
MA1 and MA0
N14 to N0
CP
T2 to T0
RSA and RSB
OS
BS4 to BS1
X
DESCRIPTION
acknowledge
programmable address bits (see Table 5)
programmable divider bits; N = N14 × 214 + N13 × 213 + ... + N1 × 2 + N0
charge-pump current; CP = 0 = 60 µA; CP = 1 = 280 µA
test bits (see Table 6); for normal operation T2 = 0, T1 = 0 and T0 = 1
reference divider ratio select bits (see Table 7)
tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON;
when OS = 1 tuning voltage is OFF (high impedance)
PNP band switch buffers control bits; when BSn = 0 buffer n is OFF;
when BSn = 1 buffer n is ON
don’t care
Table 5 I2C-bus address selection
VOLTAGE APPLIED TO THE
CE INPUT (SW = LOW)
0 to 0.1VCC1
Always valid
0.4VCC1 to 0.6VCC1
0.9VCC1 to VCC1
MA1
0
0
1
1
MA0
0
1
0
1
1996 Oct 10
7
 

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