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CS4294 View Datasheet(PDF) - Cirrus Logic

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CS4294 Datasheet PDF : 42 Pages
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CS4294
BIT_CLK
RESET#
Vdd
Trst_low
Tvdd2rst#
Trst2clk
Figure 1. Power Up Timing
BIT_CLK
SYNC
CODEC_READY
Tsync2crd
Figure 2. Clocks
BIT_CLK
Torise
SYNC
Tirise
Tclk_high Tclk_low
Tclk_period
Tifall
Tsync_high Tifall
Tsync_period
Tsync_low
Figure 3. Codec Ready from Startup or Fault Condition
8
DS326PP4
 

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