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CD4071 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
View to exact match
CD4071 Datasheet PDF : 7 Pages
1 2 3 4 5 6 7
October 1987
Revised January 1999
CD4071BC • CD4081BC
Quad 2-Input OR Buffered B Series Gate •
Quad 2-Input AND Buffered B Series Gate
General Description
The CD4071BC and CD4081BC quad gates are monolithic
complementary MOS (CMOS) integrated circuits con-
structed with N- and P-channel enhancement mode tran-
sistors. They have equal source and sink current
capabilities and conform to standard B series output drive.
The devices also have buffered outputs which improve
transfer characteristics by providing very high gain.
All inputs protected against static discharge with diodes to
VDD and VSS.
Features
s Low power TTL compatibility:
Fan out of 2 driving 74L or 1 driving 74LS
s 5V–10V–15V parametric ratings
s Symmetrical output characteristics
s Maximum input leakage 1 µA at 15V over full
temperature range
Ordering Code:
Order Number Package Number
Package Description
CD4071BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
CD4071BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CD4081BCM
M14A
14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-120, 0.150” Narrow
CD4081BCN
N14A
14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
Devices are also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
Pin Assignments for DIP and SOIC
CD4071B
CD4081B
Top View
Top View
© 1999 Fairchild Semiconductor Corporation DS005977.prf
www.fairchildsemi.com
 

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