C8051F320/1 View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

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C8051F320/1

Full Speed USB, 16 k ISP FLASH MCU Family

Silicon Laboratories 

C8051F320/1

Analog Multiplexer

P1.0

P1.7

P2.0

P2.4-2.7

available on

C8051F320

P2.7

P3.0

Temp

Sensor

VDD

19-to-1

AMUX

P1.0

Configuration, Control, and Data Registers

000

Start

Conversion 001

010

011

100

101

AD0BUSY (W)

Timer 0 Overflow

Timer 2 Overflow

Timer 1 Overflow

CNVSTR Input

Timer 3 Overflow

10-Bit

(+)

SAR

(-)

ADC

ADC Data

16

Registers

P2.4-2.7

available on

C8051F320

P1.7

P2.0

P2.7

P3.0

VREF

GND

19-to-1

AMUX

End of

Conversion

Interrupt

Window Compare

Logic

Window

Compare

Interrupt

Figure 1.10. 10-Bit ADC Block Diagram

1.10. Comparators

C8051F320/1 devices include two on-chip voltage comparators that are enabled/disabled and configured

via user software. Port I/O pins may be configured as comparator inputs via a selection mux. Two compar-

ator outputs may be routed to a Port pin if desired: a latched output and/or an unlatched (asynchronous)

output. Comparator response time is programmable, allowing the user to select between high-speed and

low-power modes. Positive and negative hysteresis are also configurable.

Comparator interrupts may be generated on rising, falling, or both edges. When in IDLE mode, these inter-

rupts may be used as a “wake-up” source. Comparator0 may also be configured as a reset source.

Figure 1.11 shows the Comparator0 block diagram.

Rev. 1.4

25

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