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MC145191F View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
View to exact match
MC145191F
Motorola
Motorola => Freescale Motorola
MC145191F Datasheet PDF : 24 Pages
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ANALOG CHARACTERISTICS—CURRENT SOURCE/SINK OUTPUT—PDout
(Iout 2 mA, VDD = VCC = 4.5 to 5.5 V, VDD VPD. Voltages Referenced to GND)
Parameter
Maximum Source Current Variation (Part–to–Part)
Test Condition
MC145190: Vout = 0.5 × VPD
VPD
8.0
9.5
Guaranteed
Limit
Unit
± 20
%
± 20
MC145191: Vout = 0.5 × VPD
4.5
± 20
%
5.5
± 20
Maximum Sink–vs–Source Mismatch (Note 3)
MC145190: Vout = 0.5 × VPD
8.0
12
%
9.5
12
MC145191: Vout = 0.5 × VPD
4.5
12
%
5.5
12
Output Voltage Range (Note 3)
MC145190: Iout Variation 20%
8.0
0.5 to 7.5
V
9.5
0.5 to 9.0
MC145191: Iout Variation 20%
4.5
0.5 to 4.0
V
5.5
0.5 to 5.0
NOTES:
1. Percentages calculated using the following formula: (Maximum Value – Minimum Value) / Maximum Value.
2. See Rx Pin Description for external resistor values.
3. This parameter is guaranteed for a given temperature within – 40° to + 85°C.
AC INTERFACE CHARACTERISTICS (VDD = 4.5 to 5.5 V, TA = – 40 to + 85°C, CL = 50 pF, Input tr = tf = 10 ns;
MC145190: VPD = 8.0 to 9.5 V; MC145191: VPD = 4.5 to 5.5 V with VDD VPD)
Symbol
Parameter
Figure
No.
Guaranteed
Limit
fclk
tPLH, tPHL
Serial Data Clock Frequency (Note: Refer to Clock tw below)
Maximum Propagation Delay, CLK to OUTPUT A (Selected as Data Out)
1
dc to 4.0
1, 5
105
tPLH, tPHL
tPZL, tPLZ
Maximum Propagation Delay, ENB to OUTPUT A (Selected as Port)
Maximum Propagation Delay, ENB to OUTPUT B
2, 5
100
2, 6
120
tTLH, tTHL Maximum Output Transition Time, OUTPUT A and OUTPUT B;
tTHLONLY, on OUTPUT B
1, 5, 6
100
Cin
Maximum Input Capacitance – Din, ENB, CLK
10
Unit
MHz
ns
ns
ns
ns
pF
TIMING REQUIREMENTS
(VDD = VCC = 4.5 to 5.5 V, TA = – 40 to + 85°C, Input tr = tf = 10 ns unless otherwise indicated)
Symbol
Parameter
tsu, th
Minimum Setup and Hold Times, Din vs CLK
tsu, th, trec Minimum Setup, Hold and Recovery Times, ENB vs CLK
tw
Minimum Pulse Width, ENB
tw
Minimum Pulse Width, CLK
tr, tf
Maximum Input Rise and Fall Times – CLK
* The minimum limit is 3 REFin cycles or 195 fin cycles, whichever is greater.
Figure
No.
3
4
4
1
1
Guaranteed
Limit
Unit
20
ns
100
ns
*
cycles
125
ns
100
µs
MC145190MC145191
4
MOTOROLA
 

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