1) Protection Circuits
Over-current Protection Circuit
A built-in over-current protection circuit corresponding to the current capacity prevents the destruction of the IC when there
are load shorts. This protection circuit is a “7”-shaped current control circuit that is designed such that the current is restricted
and does not latch even when a large current momentarily flows through the system with a high-capacitance capacitor.
However, while this protection circuit is effective for the prevention of destruction due to unexpected accidents, it is not
suitable for continuous operation or transient use. Please be aware when creating thermal designs that the overcurrent
protection circuit has negative current capacity characteristics with regard to temperature (Refer to Fig.6 and 18).
Thermal Shutdown Circuit (Thermal Protection)
This system has a built-in temperature protection circuit for the purpose of protecting the IC from thermal damage.
As shown above, this must be used within the range of acceptable loss, but if the acceptable loss happens to be
continuously exceeded, the chip temperature Tj increases, causing the temperature protection circuit to operate.
When the thermal shutdown circuit operates, the operation of the circuit is suspended. The circuit resumes operation
immediately after the chip temperature Tj decreases, so the output repeats the ON and OFF states (Please refer to
Fig.14 and 26 for the temperatures at which the temperature protection circuit operates).
There are cases in which the IC is destroyed due to thermal runaway when it is left in the overloaded state. Be sure to
avoid leaving the IC in the overloaded state.
In order to prevent the destruction of the IC when a reverse current flows through the IC, it is recommended that a diode
be placed between the Vcc and Vo and a pathway be created so that the current can escape (Refer to Fig.35).
Fig.35 Bypass diode
2) This IC is bipolar IC that has a P-board (substrate) and P+ isolation layer between each devise, as shown in Fig.36. A
P-N junction is formed between this P-layer and the N-layer of each device, and the P-N junction operates as a parasitic
diode when the electric potential relationship is GND> Pin A, GND> Pin B, while it operates as a parasitic transistor when
the electric potential relationship is Pin B GND> Pin A. Parasitic devices are structurally inevitable in the IC. The
operation of parasitic devices induces mutual interference between circuits, causing malfunctions and eventually the
destruction of the IC. It is necessary to be careful not to use the IC in ways that would cause parasitic elements to
operate. For example, applying a voltage that is lower than the GND (P-board) to the input terminal.
Fig.36 Example of the basic structure of a bipolar IC
Status of this document
The Japanese version of this document is formal specification. A customer may use this translation version only for a reference
to help reading the formal version.
If there are any differences in translation version of this document formal version takes priority.
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