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APN1001 View Datasheet(PDF) - Skyworks Solutions

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APN1001 Datasheet PDF : 5 Pages
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APPLICATION NOTE
APN1001: Circuit Models for
Plastic Packaged Microwave Diodes
Abstract
This paper reports on the measurement and establishment of
circuit models for SOT-23 and SOD-323 packaged diodes.
Results indicate that the 1.5 nH estimate for the SOT-23 is a
useful result, as is 1.2 nH for SOD-323 single packaged diodes.
It was also determined that the effective inductance of the
SOT-23 may be reduced to approximately 0.4 nH by adding a
second bond wire and modifying the microstrip line. Other lead
configurations, including parallel bond wires and common
cathode configurations, were also studied.
Introduction
Discrete, low-cost, surface mount semiconductor diodes are
attractive choices for UHF and microwave applications where
package parasitic may have a significant impact on performance.
The most common package styles are the SOT-23 and the
SOD-323 (Figure 1) which were neither designed nor intended
for RF service. A primary limitation to their high-frequency
performance, particularly in PIN diode shunt connected switches,
is parasitic package inductance, which limits high-frequency
isolation. The model information available from vendors of these
devices has been generally limited to estimates of inductance,
typically 1.5 nH, for single junction SOT-23 diodes. Establishing
a better model will enable circuit designers to better predict
performance and possibly give the manufacturer alternative
designs to reduce package parasitic effects.
SOT-23
SOD-323
Figure 1. Diode Package Styles
Package Modeling
Network Analysis
To create a high-frequency device model S-parameter, measure-
ments were taken over a wide frequency band so that resonance
and other high order effects would be included in the measure-
ments. This procedure utilizes an HP 8510C vector network
analyzer. The package under test was inserted into an Inter-
Continental Microwave test fixture as a series connected
element. This fixture uses a Thru-Reflect-Line calibration
procedure to produce accurate calibration and assures a
reference plane at the device under test.
Using this methodology, a circuit model was generated for each
of the devices as shown in Figures 2 and 3. These models pro-
duce very good correlation between the measured and simulated
performance as shown in Figure 4.
L = 0.65 nH
L = 0.05 nH
L = 0.7 nH
C = 0.13 pF
C = 0.01 pF
C = 0.015 pF
C = 0.13 pF
Figure 2. SOT-23 Circuit Model
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