COMPATIBLE CHIP ERASE TIMING WAVEFORM
All data in chip are erased. Control verification and
additional erasure externally according tocompatible chip
erase flowchart.
MX28F2000P
Vcc 5V
12V
Vpp
0V
A0 ~ A17
WE
CE
OE
Q7
Q0~Q6
Setup chip erase/
erase command
Chip erase
Erase Verify
tVPS
tCWC
tET
tOES tCEP tCEPH1 tCEP
tDS tDH tDS tDH
Command in Command in
Command in Command in
Command #20H Command #20H
Verify
Address
tAS tAH
tCESV
tCEP
tCES
tVPH
tCESC
tDS tDH
Command in
tVA
tDF
Data valid
Command in
Command #A0H
Data valid
P/N: PM0380
REV. 1.5, OCT 29, 1998
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