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AN8028 View Datasheet(PDF) - Panasonic Corporation

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AN8028 Datasheet PDF : 13 Pages
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AN8028
Voltage Regulators
s Application Notes (continued)
[1] Operation descriptions (continued)
7. Overvoltage protection circuit (OVP) (continued)
Operating supply current characteristics
While the OVP is operating, the decrease of the supply current causes the rise of the supply voltage VCC , and
in the worst case, the guaranteed breakdown voltage of the IC (35 V) can be exceeded. In order to prevent the rise
of supply voltage, the IC is provided with such characteristics as that the supply current rises in the constant
resistance mode. This characteristics ensure that the OVP can not be released unless the AC input is cut, if the
supply voltage VCC under OVP operating has been stabilized over the OVP release supply voltage (which depends
on start resistor selection). (Refer to figure 9.)
After AC rectification
Start resistor
R1
VCC
The current supply from the start resistor continues
as long as the voltage of the power supply input (AC)
is given.
After OVP starts operation, since the output is
stopped, this bias coil does not supply current.
VOUT
GND
* Select the resistance value so that the following
relationship can be kept by current supply from
the start resistor: VCC > VCCOVP
ICC
At VCCOVP (voltage under which OVP is released)
as the boundary, the operating current is temporarily
increased.
This prevents VCC from exceeding the breakdown
voltage due to the current supplied from the above
start resistor.
VCCOVP
VCC
Figure 9
8. Timer latch
When the short-circuit or overload of the power supply output continues for a certain period, the pulse-by-pulse
overcurrent protection is not sufficient for protection of the transformer, fast recovery diode (FRD), Schottky diode
in the secondary side, and the power MOSFET. For this reason, the timer latch function is employed, which stops
the power supply by hitting the OVP when the overcurrent condition continues for a certain period.
The short-circuit or overload of the power supply output is monitored as the decrease of the power supply
output (at this time the pulse-by-pulse overcurrent protector is in the operating condition). The decrease of the
power supply output is detected as the decrease of current amount at the current feedback terminal of IFB. When
the decrease amount of this current exceeds a certain value, the comparator inside the IC reverses, and the constant
current flows to the TIM/OVP terminal.
The external capacitor is connected to the TIM/OVP terminal. Electric charges are accumulated in this capaci-
tor, rising the OVP terminal voltage. When the OVP operating threshold voltage (7.3 V typical) is reached, the OVP
starts operation to stop the IC, and keeps this stop condition. (Refer to figure 10.)
Timer period
The period from the time when an error of the power supply output is detected to the time when the OVP starts
operation (hereinafter referred to as "timer period") should be longer than the rise time of the power supply. Since
at operation start the IC is in the same condition as the overload or output short-circuit condition, if the timer
period is shorter, the power supply works latch and can not start.
Therefore, the IC is designed so that the timer period can be set arbitrarily by the value of the external
capacitor connected to the TIM/OVP terminal. However, particular care should be taken, because too large value
of this capacitor may cause the breakdown of the power supply.
10
 

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