AM29LV160M View Datasheet(PDF) - Advanced Micro Devices

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AM29LV160M

16 Megabit (2 M x 8-Bit/1 M x 16-Bit) MirrorBit™ 3.0 Volt-only Boot Sector Flash Memory

Advanced Micro Devices 

Data Sheet

The internal state machine is set for reading array data upon device power-up,

or after a hardware reset. This ensures that no spurious alteration of the mem-

ory content occurs during the power transition. No command is necessary in

this mode to obtain array data. Standard microprocessor read cycles that as-

sert valid addresses on the device address inputs produce valid data on the

device data outputs. The device remains enabled for read access until the com-

mand register contents are altered.

See “Reading Array Data” on page 23 for more information. Refer to the table

“Read Operations” on page 42 for timing specifications and to Figure 13, on page

42 for the timing diagram. ICC1 in the table “CMOS Compatible” on page 40 rep-

resents the active current specification for reading array data.

Writing Commands/Command Sequences

To write a command or command sequence (which includes programming data

to the device and erasing sectors of memory), the system must drive WE# and

CE# to VIL, and OE# to VIH.

For program operations, the BYTE# pin determines whether the device accepts

program data in bytes or words. Refer to “Word/Byte Configuration” on page 10

for more information.

The device features an Unlock Bypass mode to facilitate faster programming.

Once the device enters the Unlock Bypass mode, only two write cycles are re-

quired to program a word or byte, instead of four. The “Word/Byte Program

Command Sequence” on page 24 contains details on programming data to the

device using both standard and Unlock Bypass command sequences.

An erase operation can erase one sector, multiple sectors, or the entire device.

Table 2, on page 13 and Table 3, on page 14 indicate the address space that each

sector occupies. A “sector address” consists of the address bits required to

uniquely select a sector. The sector “Command Definitions” on page 23 contains

details on erasing a sector or the entire chip, or suspending/resuming the erase

operation.

After the system writes the autoselect command sequence, the device enters the

autoselect mode. The system can then read autoselect codes from the internal

register (which is separate from the memory array) on DQ7–DQ0. Standard read

cycle timings apply in this mode. Refer to the sections “Autoselect Mode” on

page 15 and “Autoselect Command Sequence” on page 24 for more information.

ICC2 in the DC Characteristics table represents the active current specification for

the write mode. The section “AC Characteristics” on page 42 contains timing

specification tables and timing diagrams for write operations.

Program and Erase Operation Status

During an erase or program operation, the system may check the status of the

operation by reading the status bits on DQ7–DQ0. Standard read cycle timings

and ICC read specifications apply. Refer to “Write Operation Status” on page 33

for more information, and to “AC Characteristics” on page 42 for timing diagrams.

Standby Mode

When the system is not reading or writing to the device, it can place the device

in the standby mode. In this mode, current consumption is greatly reduced, and

the outputs are placed in the high impedance state, independent of the OE#

input.

January 31, 2007 25974B5

Am29LV160M

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